Wear-Level Aware Memory Allocation for NAND Flash

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Solution Overview

Problem

Existing memory allocation schemes, particularly in systems with limited write endurance like NAND flash memory, often lead to uneven wear and premature device failure due to inefficient allocation strategies that do not consider the wear-out-level of memory pages.

Innovation Solution

A wear-level aware memory allocation method that maps memory pages to different group levels based on their usage, using a data structure that includes a wear-level tree and free lists to select pages with the lowest wear-out-level for allocation, and coalesces pages on demand to manage wear evenly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory pages are allocated using traditional allocation schemes, then allocation speed is improved, but wear uniformity deteriorates

Engineering Contradiction:
Improveallocation speedVSAvoidwear uniformity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the allocation parameter from simple availability to wear-out-level awareness. The memory allocator selects pages based on their wear-out-level parameter, choosing pages with lower wear levels for allocation. This parameter change enables the system to maintain allocation speed while significantly improving wear uniformity across the memory device.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the traditional mechanical allocation system (which allocates based on simple availability or round-robin schemes) with a wear-aware allocation mechanism. This new mechanism uses wear-out-level information to make allocation decisions, substituting the old allocation logic with a more intelligent system that extends device life while maintaining performance.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Device complexity

If memory pages are allocated without considering wear-out-level, then allocation simplicity is improved, but device lifespan deteriorates

Engineering Contradiction:
Improveallocation complexityVSAvoiddevice lifespan
Core Design Contradiction:
Device complexityVSDuration of action of stationary object

Solution Approach 1:

The patent implements preliminary action by pre-tracking the wear-out-level of each memory page before allocation occurs. The system maintains wear counters for each page and uses this pre-computed information during allocation decisions. This preliminary tracking enables wear-aware allocation without adding complex real-time calculations during the allocation process itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces wear-out-level information as an intermediary parameter between the allocation request and the page selection process. This intermediary metric allows the allocator to make informed decisions about which pages to use, balancing wear distribution across the device. The wear-out-level acts as a mediator that guides allocation without requiring complete redesign of the allocation mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If wear-level aware allocation is implemented, then wear uniformity is improved, but data structure complexity deteriorates

Engineering Contradiction:
Improvewear uniformityVSAvoiddata structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the memory management data structures into distinct components: a free list organized by wear levels, a page state map tracking individual page status, and a tree structure for efficient wear-level queries. This segmentation allows each component to have a specific, simplified function while collectively providing wear-aware allocation capabilities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds a wear-level dimension to the traditional memory allocation data structures. Instead of managing only the available/allocated state of pages, the system organizes pages in an additional dimension based on their wear-out-level. This dimensional extension enables wear-aware allocation while maintaining efficient access patterns through the organized data structure hierarchy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12111756B2Systems, methods, and apparatus for wear-level aware memory allocation
Publication Date: 2024.10.08 SAMSUNG ELECTRONICS CO LTD
  • US12111756B2 patent drawing
  • US12111756B2 patent drawing
  • US12111756B2 patent drawing

AI summary

A method for memory allocation may include determining an amount of use for a first memory page, wherein the first memory page is mapped to a first page group of a first group level, a second memory page may be mapped to a second page group of the first group level, and the first memory page and the second memory page may be mapped to a third page group of a second group level, and selecting, based on an allocation request, the first memory page based on the amount of use. The amount of use may include a first amount of use, and the method may further include determining a second amount of use for the second memory page, wherein the first memory page may be selected based on the first amount of use and the second amount of use.