Wear Leveling via Address Randomization and Rotation
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Solution Overview
Problem
Endurance-limited solid-state storage devices face reduced write endurance compared to traditional mechanical storage devices, leading to potential data corruption and reduced storage capacity due to rapid wear out of memory blocks, especially with increased utilization and susceptibility to malicious attacks.
Innovation Solution
A multi-level wear leveling method involving address randomization through swizzling and XOR functions, followed by global or local rotation, to distribute writes evenly across memory blocks and prevent malicious attacks by hiding mapping information between logical and physical block addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If wear leveling is implemented to extend device lifespan, then write endurance is improved, but device complexity increases
Solution Approach 1:
The patent implements periodic address reassignment where the wear leveling module periodically changes the mapping between logical block addresses and physical block addresses. This periodic action distributes writes across different memory blocks over time, extending device lifespan without requiring complex real-time monitoring and decision-making mechanisms.
Solution Approach 2:
The patent introduces a wear leveling module as an intermediary layer between the host interface and the memory blocks. This module handles address translation and reassignment, shielding the complexity of wear leveling management from both the host system and the underlying memory blocks, thereby simplifying the overall system architecture.
2Duration of action of stationary object
If address randomization is used to distribute writes evenly, then write endurance is improved, but susceptibility to malicious attacks increases
Solution Approach 1:
The patent applies address swizzling and XOR operations as preliminary actions on logical block addresses before they are mapped to physical block addresses. These transformations obscure the relationship between logical and physical addresses, making it difficult for malicious attacks to target specific memory locations while still enabling effective wear leveling.
3Stability of the object's composition
If comprehensive wear leveling monitoring is implemented, then write distribution is improved, but processing overhead increases
Solution Approach 1:
The wear leveling module operates autonomously to manage address reassignment and write distribution without requiring extensive external monitoring or control. The periodic reassignment mechanism self-regulates write distribution across memory blocks, reducing the need for complex monitoring systems and associated processing overhead.
Data Source
AI summary
A method of wear leveling for a storage device or a memory device includes: receiving an inputted memory address; randomizing the inputted memory address to be a randomized memory address; and periodically reassigning the randomized memory address to be a different memory address.


