Wear Leveling for Multi-Core Server Processor Lifetime

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Solution Overview

Problem

Modern data centers face significant costs and reduced CPU chip lifetime due to uneven wear across processing cores in CPUs, leading to premature failure and costly replacements, as very active cores wear out faster and fail earlier than less active ones.

Innovation Solution

A wear leveling system that moderates the accumulation of wear across multiple server computers by assigning tasks based on the wear level of each processing core, ensuring that all cores wear at a similar rate, thereby extending the reliable and useful lifetime of processor chips and allowing for flexible overclocking without affecting user-level applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If tasks are assigned to processing cores based on activity patterns, then productivity is improved, but wear accumulation becomes uneven and reliability deteriorates

Engineering Contradiction:
Improveprocessing throughputVSAvoidCPU chip lifetime
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary wear leveling by proactively monitoring wear levels of processing cores and redistributing tasks before any core reaches its failure threshold. This preventive approach ensures that no single core accumulates excessive wear that would lead to premature CPU failure, while maintaining high productivity through efficient task scheduling.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The task scheduling system dynamically adjusts core selection based on real-time wear level monitoring. As cores wear down from use, the system adaptively redirects new tasks to fresher cores, creating a dynamic load distribution that balances productivity needs with wear management across the multi-core processor.

Inventive Principle:
Principle #15Dynamics

2Reliability

If wear leveling is implemented across multiple server computers, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveprocessor chip lifetimeVSAvoidsystem management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The wear leveling system is designed to operate universally across heterogeneous server computers with different processor architectures and workloads. By implementing a standardized wear monitoring and task redistribution mechanism that works across multiple server types, the system achieves extended reliability without requiring complex server-specific management logic.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system introduces a wear level monitoring intermediary that acts as a mediator between the task scheduling system and the physical processing cores. This intermediary layer abstracts the complexity of wear management by providing a unified interface for tracking wear levels and making redistribution decisions, simplifying the overall system architecture while extending processor lifetime.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10218779B1Machine level resource distribution
Publication Date: 2019.02.26 GOOGLE LLC
  • US10218779B1 patent drawing
  • US10218779B1 patent drawing
  • US10218779B1 patent drawing

AI summary

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for machine level resource distribution are disclosed. In one aspect, a method is implemented in a data processing apparatus, which includes, for each server computer in a set of two or more server computers within a data center, wherein each server computer includes a plurality of processing cores, receiving wear data describing, for each processing core of the server computer, a wear level for the processing core that is indicative of accumulated wear of the processing core, and moderating accumulation of wear in the processor cores based on the wear level of the processing cores from at least two different server computers.