Application-Defined Multi-Tiered Wear-Leveling for Storage Class Memory
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Solution Overview
Problem
Existing memory systems face uneven wear on memory cells due to repetitive writing and erasing, leading to premature degradation and performance issues, as typical wear-leveling methods are coarse-grained and do not account for application-specific requirements.
Innovation Solution
Implementing a method where a processor in a memory device obtains a wear-leveling policy from an application to perform wear-leveling based on specific memory sizes (bit, nibble, codeword, sector) and thresholds, allowing for application-defined multi-tiered wear-leveling and cross-instance wear-leveling when permitted by policy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If coarse-grained wear-leveling is used, then device complexity is reduced, but manufacturing precision of wear distribution is insufficient leading to premature degradation
Solution Approach 1:
The patent segments wear-leveling into multiple hierarchical tiers: fine-grained tier (bit/nibble/codeword level), intermediate tier (sector level), and coarse-grained tier (instance level). Each tier handles specific wear distribution tasks, with fine-grained wear-leveling distributing wear within small units, intermediate tier handling sector-level distribution, and coarse-grained tier managing instance-level distribution. This segmentation enables precise wear control without requiring a single complex mechanism to handle all granularity levels simultaneously.
Solution Approach 2:
The patent introduces a hierarchical dimension to wear-leveling by organizing wear distribution across multiple levels of granularity. Instead of a single flat wear-leveling pass, the system performs wear-leveling operations at bit/nibble/codeword level, then sector level, then instance level, creating a multi-dimensional wear distribution approach that achieves both fine precision and system-wide balance.
2Adaptability or versatility
If application-specific wear-leveling policies are implemented, then adaptability to different workloads is improved, but device complexity increases due to policy management
Solution Approach 1:
The patent implements dynamic wear-leveling policies that can be adjusted based on application characteristics and workload patterns. Each application can have its own wear-leveling policy parameters (e.g., wear threshold, granularity preference, instance boundaries) that are adapted to its specific access patterns and requirements. The system dynamically selects and applies appropriate policies rather than using a static uniform approach.
Solution Approach 2:
The patent applies different wear-leveling strategies to different applications and data regions based on their specific needs. Each application instance can have customized wear-leveling parameters, and different portions of the storage system can receive tailored wear distribution treatments. This local customization enables optimal wear management for each application without imposing unnecessary complexity on the entire system.
3Manufacturing precision
If fine-grained wear-leveling is performed, then wear distribution precision is improved, but productivity decreases due to increased processing overhead
Solution Approach 1:
The patent segments fine-grained wear-leveling operations into manageable units (bits, nibbles, codewords) that can be processed efficiently in batches. By dividing the storage space into smaller addressable units and applying wear-leveling incrementally across these units rather than attempting to process everything simultaneously, the system achieves fine granularity without overwhelming processing requirements.
Solution Approach 2:
The patent performs wear-leveling on partial sets of data at each tier rather than requiring complete processing of all data before proceeding. The fine-grained wear-leveling operates on subsets of codewords and sectors, allowing progressive wear distribution without waiting for full system processing cycles. This partial action approach maintains precision while improving throughput by avoiding unnecessary full-scan overhead.
Data Source
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AI summary
A method implemented by a memory device, comprising obtaining, by a processor coupled to a memory, a wear-leveling policy from an application executable at the memory device, wherein the wear-leveling policy indicates a memory size by which to perform wear-leveling within an instance, wherein the instance comprises an address range assigned to the application in the memory of the memory device (703); obtaining, by a processor, a request to access the instance (706); and performing, by the processor, wear-leveling on a plurality of memory cells within the instance according to the wear-leveling policy (709).