Weighted Addition Circuit for CMOS Image Sensor Power Reduction

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Solution Overview

Problem

High-speed imaging in CMOS image sensors requires reading out large numbers of pixels, leading to increased power consumption and deteriorated image quality due to simple thinning-out processing.

Innovation Solution

A solid-state imaging device with a pixel array unit, a weighted addition unit, and an A/D converter that performs weighted addition and conversion on pixel signals, allowing for reduced power consumption by selectively reading out and processing pixel signals in a ratio-based manner.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If all pixel data is read out and averaged after A/D conversion, then image quality is maintained, but power consumption increases

Engineering Contradiction:

Improveimage qualityVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent performs weighted addition processing on pixel signals before A/D conversion. By pre-processing the analog signals through weighted addition in the analog domain, the system reduces the number of signals requiring full A/D conversion, thereby lowering power consumption while maintaining image quality through the weighted averaging effect

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent extracts and processes only the necessary pixel signals through selective weighted addition before A/D conversion. By taking out the essential averaging operation and performing it in the analog domain through weighted addition, the system avoids the need to read out and convert all pixel data, thus reducing power consumption while preserving image quality

Inventive Principle:

Principle #2Taking out (Extraction)

2Speed

If pixels are thinned out for high-speed readout, then readout speed increases, but image quality deteriorates

Engineering Contradiction:

Improvereadout speedVSAvoidimage quality

Core Design Contradiction:

SpeedVSMeasurement precision

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces a weighted addition circuit as an intermediary between the pixel array and the A/D converter. This intermediary performs analog weighted addition on the pixel signals, enabling high-speed readout of thinned-out pixels while maintaining image quality through the averaging effect before the signals reach the A/D conversion stage

Inventive Principle:

Principle #24Intermediary (Mediator)

3Use of energy by moving object

If weighted addition is performed before A/D conversion, then power consumption is suppressed, but device complexity increases

Engineering Contradiction:

Improvepower consumptionVSAvoidcircuit complexity

Core Design Contradiction:

Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent replaces digital processing operations with analog circuit operations. By performing weighted addition in the analog domain using simple RC circuits and switches instead of digital processors, the system achieves power consumption reduction without introducing complex digital circuitry, thus minimizing the increase in device complexity

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8736725B2Solid-state imaging device, imaging method and imaging apparatus for performing weighted addition on pixel signals

Publication Date: 2014.05.27 SONY GROUP CORP

AI summary

A solid-state imaging device includes: a pixel array unit having plural pixels arranged in a row direction and a column direction; a weighted addition unit performing weighted addition on pixel signals read out from the plural pixels as analog signals; an A/D converter performing A/D conversion of the pixel signals on which weighted addition is performed; and a computing unit computing the A/D converted pixel signals.