Weighted Capacitance Circuit Stray Capacitance Control
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Solution Overview
Problem
Existing electronic circuits with weighted-capacitance capacitors face challenges in achieving accurate and compact designs due to limitations in capacitance value accuracy and bulk size.
Innovation Solution
The solution involves arranging capacitive structures and additional capacitors in a specific configuration within an array, where additional capacitors are connected to nodes and positioned to maintain a consistent average number of neighbors for each capacitor, optimizing stray capacitance and reducing bulk while enhancing accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If weighted-capacitance capacitors are used in analog-to-digital converters, then the conversion accuracy depends on the precision of capacitance values, but achieving accurate capacitance values increases circuit bulk and complexity
Solution Approach 1:
The patent changes the physical parameter of capacitor spacing to control stray capacitance effects. By ensuring that capacitors in different weighted-capacitance groups are positioned at different distances from reference nodes, the stray capacitance values become differentiable, allowing accurate conversion without requiring perfectly matched capacitor values. This parameter change enables accurate ADC operation with compact capacitor arrangements.
Solution Approach 2:
The patent introduces asymmetric positioning of capacitors relative to reference nodes. Instead of symmetric arrangements where all capacitors would have similar stray capacitance, the design deliberately creates asymmetric distance relationships between capacitors and reference nodes. This asymmetry ensures that stray capacitance becomes a distinguishing feature rather than a source of error, resolving the contradiction between accuracy and bulk.
2Adaptability or versatility
If multiple capacitors are arranged to achieve weighted capacitance values, then the circuit functionality is improved, but the circuit bulk increases
Solution Approach 1:
The patent transitions from considering only capacitor value magnitudes to incorporating spatial dimension (distance from reference nodes) as an additional degree of freedom. By arranging capacitors at different distances in the spatial dimension, the circuit achieves weighted capacitance functionality without proportionally increasing bulk, as the distance parameter provides an extra dimension for circuit operation.
Solution Approach 2:
The patent makes the capacitor array serve multiple functions simultaneously: the same physical capacitors provide both the weighted capacitance values for conversion and the spatial distance information for distinguishing different capacitance groups. This multi-functionality eliminates the need for separate structures, reducing overall circuit bulk while maintaining full functionality.
Data Source
AI summary
An electronic circuit comprises capacitive structures that are connected to one or a plurality of nodes, where each of the capacitive structures is formed by a capacitor or by a plurality of capacitors electrically connected in parallel. The electronic circuit further comprises additional capacitors that are each connected to the one or plurality of nodes. For at least one distance between capacitors, the capacitive structures have a same average of values defined, for each capacitor of each capacitive structure, by the number of capacitors of the circuit connected to the one or plurality of nodes and located at the distance from the capacitor of the capacitive structure.