Uniform Random Shuffling via Weighted PRBS Selection Logic

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Solution Overview

Problem

Existing hardware implementations struggle to generate unbiased random permutations of indices at high speeds and with sufficient coverage for packet reassembly in packet networks, as they require extensive and costly 830-bit wide data paths for full coverage, while 32-bit wide paths can only achieve full coverage for a limited number of fragments.

Innovation Solution

A system utilizing multiple pseudo-random bit sequence generators with selection logic that weights the probability of selection based on the number of remaining pseudo-random values, allowing for the creation of a uniform, randomly shuffled sequence, enabling efficient hardware implementation of random shuffling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hardware uses 830-bit wide data paths to achieve full coverage of all possible fragment permutations, then the coverage is improved, but the device complexity and cost increase significantly

Engineering Contradiction:
ImprovecoverageVSAvoiddata path width
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the 830-bit seed space into multiple smaller 32-bit seed spaces, each covering a subset of permutations. Multiple PRBS generators with 32-bit seeds are used instead of a single generator with an 830-bit seed, making the hardware manageable while achieving full coverage through coordinated operation of multiple segments

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple PRBS generators with 32-bit seeds are combined to achieve the equivalent coverage of an 830-bit seed space. The selection logic merges the output sequences from multiple generators, each covering different subsets of permutations, to provide complete coverage of all possible fragment reorderings

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If hardware uses 32-bit wide data paths for practical implementation, then the device complexity is reduced, but the coverage is limited to a small number of fragments

Engineering Contradiction:
Improvedata path widthVSAvoidcoverage
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The selection logic and PRBS generator architecture are designed to be configurable and scalable. The same 32-bit hardware structure can be instantiated multiple times with different configurations to cover different numbers of fragments (from 2 to 144), making the system universally applicable across various network conditions without requiring redesign

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent transitions from a single-dimension approach (one large 830-bit seed) to a multi-dimensional approach (multiple 32-bit seeds coordinated through selection logic). This dimensional change allows the system to achieve the same coverage space using manageable hardware units that can be scaled and configured flexibly

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If the system generates uniform random sequences at high speeds for packet reassembly testing, then the productivity is improved, but the hardware complexity increases due to the need for full coverage

Engineering Contradiction:
Improveshuffling speedVSAvoidhardware structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The PRBS generators pre-compute pseudo-random sequences using efficient 32-bit algorithms before they are needed for packet reassembly testing. The selection logic pre-organizes which generator should produce which values, allowing the system to deliver high-speed uniform random sequences without requiring complex real-time computation for full coverage

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9529684B2Method and system for hardware implementation of uniform random shuffling
Publication Date: 2016.12.27 KEYSIGHT TECH SINGAPORE (SALES) PTE LTD
  • US9529684B2 patent drawing
  • US9529684B2 patent drawing
  • US9529684B2 patent drawing

AI summary

Methods and systems for hardware implementation of uniform random shuffling are disclosed. According to one aspect, a system for hardware implementation of uniform random shuffling includes multiple pseudo-random bit sequence (PRBS) generators, where each PRBS generator provides a pseudo-random sequence of numbers S and the next value in its pseudo-random sequence in response to receiving an output request. The system also includes selection logic for creating a sequence of output values O by repetitively selecting one of the plurality of modules according to a random selection function and sending an output request to the selected module, wherein the sequence of values O created from the output of the randomly selected modules comprises a uniform, randomly shuffled sequence. The probability that a PRBS generator will be selected is weighted based on the number N of pseudo-random values that have not yet been output out of L possible values in the sequence.