Weighted Programming Patterns for Read Disturb Compensation

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Solution Overview

Problem

Solid-state memory devices face challenges in data retention and read disturb effects, leading to decoding failures and reduced endurance, as charge loss and gain affect the ability to correctly interpret stored data over time and with frequent reads.

Innovation Solution

Implementing weighted programming patterns that favor either lower or higher voltage threshold states in solid-state memory devices to reduce charge loss and gain, thereby improving data retention and read disturb margins by strategically programming cells to minimize bit error rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is programmed into solid-state memory cells, then data storage capacity is improved, but charge loss and read disturb effects increase leading to decoding failures

Engineering Contradiction:
Improvedata storage capacityVSAvoiddata interpretation accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies parameter changes by modifying the voltage threshold distribution of programmed cells. Instead of uniform programming, the system uses weighted programming patterns that deliberately create non-uniform voltage threshold distributions, favoring certain voltage states over others. This parameter modification compensates for charge loss and read disturb effects, maintaining reliable data interpretation even as storage capacity increases.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements preliminary anti-action through read disturb compensation techniques. Before reading data, the system pre-charges or pre-adjusts the voltage thresholds of cells that are susceptible to read disturb effects. This preliminary action counteracts the harmful charge gain that would otherwise occur during subsequent read operations, preventing decoding failures before they happen.

Inventive Principle:
Principle #9Preliminary anti-action

2Duration of action of stationary object

If weighted programming patterns are applied to reduce bit error rates, then data retention is improved, but programming complexity increases

Engineering Contradiction:
Improvedata retention periodVSAvoidprogramming scheme complexity
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The patent manages programming complexity by systematically changing programming parameters using predefined weight patterns. Rather than implementing complex error correction algorithms, the system modifies the programming weights assigned to different cells based on their susceptibility to charge loss. This parameter-based approach extends data retention while keeping the programming scheme relatively simple and efficient.

Inventive Principle:
Principle #35Parameter changes

3Duration of action of stationary object

If cells are programmed with higher voltage threshold states to reduce charge loss, then data retention is improved, but read disturb margins are reduced

Engineering Contradiction:
Improvecharge retention timeVSAvoidread disturb susceptibility
Core Design Contradiction:
Duration of action of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by treating different memory cells differently based on their individual characteristics. Instead of uniformly programming all cells to high voltage states, the system assigns different weight patterns to different cells or cell groups. Cells more susceptible to charge loss receive higher voltage programming, while cells in regions prone to read disturb receive adjusted programming that balances both concerns. This localized approach optimizes both data retention and read disturb margins simultaneously.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10481809B2Read disturb compensation using weighted programming patterns
Publication Date: 2019.11.19 SANDISK TECHNOLOGIES LLC
  • US10481809B2 patent drawing
  • US10481809B2 patent drawing
  • US10481809B2 patent drawing

AI summary

A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller. The controller is configured to reduce a read disturb effect of at least a portion of the solid-state non-volatile memory at least in part by receiving or accessing data to be written to the solid-state non-volatile memory, encoding the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a higher voltage level than the second programming state, and writing the encoded data to the solid-state non-volatile memory.