Well-Connected Resistive Circuit for Lower Harmonic Distortion
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Solution Overview
Problem
The resistance value of resistors in a chip circuit changes due to well bias effects, leading to non-constant resistance and serious total harmonic distortion, complicating circuit design.
Innovation Solution
A resistive circuit design that includes first and second resistive elements with well regions connected to specific nodes, arranged in series or parallel, to reduce the influence of well bias effects, and a manufacturing method to implement this design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single resistor is used in the circuit, then the circuit structure is simple, but the resistance value changes due to well bias effect causing total harmonic distortion
Solution Approach 1:
The single resistor is divided into multiple resistive elements (first and second resistive elements) with different well region connections. Each resistive element has its well region connected to a different node, segmenting the bias effect influence. This segmentation allows the circuit to maintain simplicity while reducing the well bias effect on overall resistance value stability.
2Reliability
If the well region is connected to a fixed potential, then the bias effect is reduced, but the circuit design becomes more complex with additional connections
Solution Approach 1:
Different well regions are connected to different nodes (first well region to first node, second well region to second node) rather than all being connected to the same fixed potential. This local differentiation in connection quality allows each resistive element to experience different bias conditions, collectively reducing the overall well bias effect while maintaining manageable circuit complexity.
Data Source
AI summary
A resistive circuit and a manufacturing method thereof and an amplifier circuit are provided. The resistive circuit includes one or more first resistive elements and one or more second resistive elements. The one or more first resistive elements are arranged in series or in parallel along a first path, and the one or more second resistive elements are arranged in series or in parallel along a second path. The one or more first resistive elements and the one or more second resistive elements are connected in parallel between a first node and a second node. Each of the first resistive element and the second resistive element include a well region, the well region of each of first resistive elements is connected to the first node, and the well region of each of the second resistive elements is connected to the second node.