Well Oxide Thickness Modulation for N-Well and P-Well Inspection

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Solution Overview

Problem

In the formation of integrated circuits, existing methods fail to effectively distinguish and inspect defects in n-well and p-well regions due to lack of sufficient contrast and step height between these regions, which hinders defect identification and root cause analysis.

Innovation Solution

A method is introduced where a pad oxide layer is formed with varying thicknesses over n-well and p-well regions, followed by a well anneal process using oxygen, resulting in a step height difference after oxide removal, enabling distinction between the regions and facilitating defect inspection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If n-well and p-well regions are formed by implanting impurities into semiconductor substrates, then integrated circuit devices can be formed, but the regions cannot be effectively distinguished or inspected due to lack of sufficient contrast and step height

Engineering Contradiction:
Improvedefect inspection capabilityVSAvoidregion distinction difficulty
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

A pad oxide layer is formed over the n-well and p-well regions before defect inspection. This preliminary action creates a thickness difference between regions that enables subsequent contrast enhancement during inspection, allowing defects to be clearly identified in each region type.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pad oxide layer is formed with different thicknesses over different well regions (thinner over n-well, thicker over p-well). This local variation in oxide thickness creates distinct electrical and topographical characteristics for each region, enabling clear distinction and inspection of defects in n-well versus p-well areas.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If uniform oxide layers are used over n-well and p-well regions, then processing is simplified, but contrast between regions is insufficient for effective defect identification

Engineering Contradiction:
Improveprocessing simplicityVSAvoidregion contrast information
Core Design Contradiction:
Ease of manufactureVSLoss of information

Solution Approach 1:

Instead of using uniform oxide thickness, the pad oxide layer is specifically engineered with different thicknesses over different well regions. This local differentiation maintains processing simplicity while providing the necessary contrast information for defect inspection, as the thickness difference can be achieved through standard semiconductor fabrication techniques.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method creates a clear step height between n-well and p-well regions, allowing for effective defect identification and analysis through enhanced contrast, improving defect detection and root cause determination in integrated circuit formation.

Implementation Method 1

a pad oxide layer is formed over a semiconductor substrate. An n-well region and a p-well region are formed, and join to each other. A well anneal process is then performed, with the process gas for the well anneal process including oxygen.

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

A well anneal process is then performed, with the process gas for the well anneal process including oxygen. Accordingly, in the well anneal process, a thicker surface portion of the n-well region is oxidized than the oxidized surface portion of the p-well region.

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS20240079278A1Well Modulation for Defect Inspection
Publication Date: 2024.03.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240079278A1 patent drawing
  • US20240079278A1 patent drawing
  • US20240079278A1 patent drawing

AI summary

A method includes forming a pad layer. The pad layer includes a first portion over a first part of a semiconductor substrate, and a second portion over a second part of the semiconductor substrate. The first portion has a first thickness, and the second portion has a second thickness smaller than the first thickness. The semiconductor substrate is then annealed to form a first oxide layer over the first part of the semiconductor substrate, and a second oxide layer over the second part of the semiconductor substrate. The pad layer, the first oxide layer, and the second oxide layer are removed. A semiconductor layer is epitaxially grown over and contacting the first part and the second part of the semiconductor substrate.