Well Pick-Up Structure for Non-Volatile Memory

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Solution Overview

Problem

Conventional NAND-type non-volatile memory well pick-up structures occupy area on word lines and bit lines, leading to reduced device integrated density and increased manufacturing costs due to non-uniform line widths caused by optical proximity effects.

Innovation Solution

A method of manufacturing a well pick-up structure that forms a conductive layer connected to the well extension doped region, avoiding area occupation on word lines and bit lines, using tungsten, copper, or aluminum materials and chemical-mechanical polishing, and integrating the well pick-up structure with source line plugs to enhance conductivity and reduce resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If well pick-up structures are formed in the memory array to reduce well resistance, then the device operating speed is improved, but the area of word line is occupied and line width uniformity deteriorates

Engineering Contradiction:
Improvedevice operating speedVSAvoidline width uniformity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The well pick-up structure is moved from the horizontal plane (occupying word line area) to the vertical dimension (forming a conductive layer in an opening through the interlayer insulating layer). This dimensional transition allows the well pick-up structure to connect to the well extension doped region without occupying the word line area, thus maintaining line width uniformity while still reducing well resistance to improve device operating speed.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If well pick-up structures are formed in the memory array to reduce well resistance, then the erasing speed is improved, but the device integrated density deteriorates

Engineering Contradiction:
Improveerasing speedVSAvoiddevice integrated density
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The well pick-up structure is positioned in the vertical dimension within an opening through the interlayer insulating layer, rather than occupying horizontal space in the memory array. This allows the structure to maintain erasing speed performance while preserving device integrated density by not consuming additional area in the memory array plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If precise masks are used to adjust line widths for well pick-up structures, then the manufacturing precision is improved, but the manufacturing cost increases

Engineering Contradiction:
Improveline width adjustment precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The well pick-up structure formation process is extracted from the word line patterning process. Instead of using precise masks to adjust line widths during word line formation, the well pick-up structure is formed separately in an opening through the interlayer insulating layer. This extraction eliminates the need for complex mask adjustments, maintaining manufacturing precision while reducing manufacturing cost.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method increases device operation speed and performance by reducing well resistance, avoids non-uniform line width issues, and simplifies the manufacturing process, thereby enhancing integrated density and process window.

Implementation Method 1

using tungsten, copper, or aluminum materials and chemical-mechanical polishing

Methodology Applied
Scientific EffectChemical-mechanical polishing:

Data Source

PatentUS7429503B2Method of manufacturing well pick-up structure of non-volatile memory
Publication Date: 2008.09.30 RENESAS TECHNOLOGY CORP
  • US7429503B2 patent drawing
  • US7429503B2 patent drawing
  • US7429503B2 patent drawing

AI summary

A method of manufacturing a well pick-up structure of a non-volatile memory is provided. A substrate including a first conductive type well, device isolation structures and dummy memory columns is provided. Each of the dummy memory columns includes a second conductive type source region and a second conductive type drain region. A first interlayer insulating layer with an opening is formed over the substrate, and the opening exposes the two adjacent second conductive type drain regions and the device isolation structure between the two adjacent second conductive type drain regions. A portion of the device isolation structure exposed by the opening is removed, and then a first conductive type well extension doped region is formed in the substrate exposed by the opening. A well pick-up conductive layer is formed in the opening. Dummy bit lines electrically connecting the well pick-up conductive layer are formed over the substrate.