Wet Etch Trench Formation in Semiconductor Substrates

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Solution Overview

Problem

Existing methods for fabricating image sensors, particularly back-side illuminated (BSI) image sensors, face challenges in forming trenches with vertical sidewalls without damaging the substrate lattice, which can impair detection performance due to the use of plasma etching processes.

Innovation Solution

A method involving a wet etching process with a metal catalyst layer is used to form trenches on both the front-side and back-side of the substrate, ensuring vertical sidewalls and preventing lattice damage, thereby enabling the creation of deep trench isolation (DTI) structures suitable for high aspect ratio applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If plasma etching process is used to form trenches, then etching speed and depth control are improved, but substrate lattice damage occurs which impairs detection performance

Engineering Contradiction:
Improveetching speedVSAvoidsubstrate lattice damage
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent replaces the plasma etching process (mechanical/physical method) with a wet chemical etching process. This substitution eliminates the lattice damage caused by plasma while maintaining effective trench formation capability, directly resolving the contradiction between etching efficiency and substrate integrity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the etching methodology from plasma-based to wet chemical-based, fundamentally altering the etching parameters and mechanism. This parameter change allows trench formation without the harmful side effects of plasma etching, achieving both adequate etching performance and substrate protection.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If deep trench isolation structures are formed, then cross-contamination between pixel regions is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvecross-contamination preventionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a metal catalyst layer as an intermediary element that simplifies the deep trench formation process. This catalyst layer enables controlled chemical etching to achieve the desired deep trench isolation structure, reducing manufacturing complexity while maintaining effective cross-contamination prevention between pixel regions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of image sensors with enhanced detection capabilities for long wavelength light, such as infrared, by maintaining the substrate's integrity and reducing cross-contamination between pixel regions, while also enlarging the areas of the pixel regions.

Implementation Method 1

forming a metal catalyst layer on an etching area of the semiconductor substrate; performing a wet etch process to the semiconductor substrate to etch the etching area of the semiconductor substrate under the metal catalyst layer

Methodology Applied
Scientific EffectCatalysis: Catalysis

Data Source

PatentUS20210020669A1Method for forming a semiconductor device
Publication Date: 2021.01.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20210020669A1 patent drawing
  • US20210020669A1 patent drawing
  • US20210020669A1 patent drawing

AI summary

A method for fabricating a semiconductor device is provided. The method includes forming a metal catalyst layer on an etching area of the semiconductor substrate; performing a wet etch process to the semiconductor substrate to etch the etching area of the semiconductor substrate under the metal catalyst layer, thereby forming a trench in the semiconductor substrate; and removing the metal catalyst layer from the semiconductor substrate after performing the wet etch process.