High-k Dielectric Reliability via Wet Etching BARC Removal
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Solution Overview
Problem
The use of dry etching in the removal of the BARC layer during the semiconductor manufacturing process causes plasma-induced damage and bulk traps in the high-k dielectric layer, leading to reduced reliability and performance issues such as positive bias temperature instability and time-dependent dielectric breakdown.
Innovation Solution
A method involving the use of a wet etching process, potentially combined with dry etching, to remove the semiconductor layer from the trenches without a BARC layer, thereby mitigating damage to the high-k dielectric layer and improving its reliability, using etchants like tetramethylammonium hydroxide or aqueous ammonia solutions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dry etching is used to remove the BARC layer, then the BARC layer removal is effective, but plasma-induced damage and bulk traps are generated in the high-k dielectric layer, reducing its reliability
Solution Approach 1:
The patent extracts and removes the BARC layer completely from the process by using wet etching instead of dry etching. The wet etching process selectively removes the BARC layer without generating plasma-induced damage to the high-k dielectric layer, thereby eliminating the harmful effect while maintaining the beneficial function of BARC removal.
Solution Approach 2:
The patent changes the etching method from dry etching to wet etching, altering the physical-chemical parameters of the etching process. This parameter change eliminates plasma exposure to the high-k dielectric layer while maintaining effective BARC layer removal through chemical etching mechanisms.
2Manufacturing precision
If a BARC layer is used during metal gate formation, then trench filling capability and surface flatness are improved, but the BARC layer requires subsequent removal that damages the high-k dielectric layer
Solution Approach 1:
The patent extracts the harmful effect of BARC layer removal by eliminating the dry etching step. The BARC layer is removed using wet etching which does not damage the high-k dielectric layer, thereby maintaining the manufacturing precision benefits of using BARC while removing the reliability penalty.
Solution Approach 2:
The patent introduces wet etching as an intermediary process that mediates between the need for effective BARC layer removal and the protection of the high-k dielectric layer. The wet etching process serves as a gentle mediator that removes the BARC layer without the harsh plasma conditions that cause damage.
3Object-generated harmful factors
If the high-k dielectric layer thickness is increased to reduce gate leakage current, then gate leakage is reduced, but the device size increases
Solution Approach 1:
The patent changes the dielectric material parameter from conventional silicon dioxide to high-k dielectric material. This material parameter change allows achieving the same gate leakage reduction with a thinner physical layer, or alternatively, provides enhanced reliability margins when the layer is thicker, without increasing device footprint.
Solution Approach 2:
The patent uses composite material structure with high-k dielectric material that combines high dielectric constant properties with appropriate thickness to achieve superior gate leakage control compared to conventional materials, effectively resolving the trade-off between leakage reduction and device size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of the high-k dielectric layer by reducing plasma-induced damage and maintaining device performance, eliminating the need for a BARC layer and its associated risks.
Implementation Method 1
A method involving the use of a wet etching process, potentially combined with dry etching, to remove the semiconductor layer from the trenches without a BARC layer
Implementation Method 2
the use of dry etching in the BARC layer removal may cause damage to the high-k dielectric layer below the BARC layer, resulting in plasma induced damage (PID)
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, an interlayer dielectric layer on the semiconductor substrate, a plurality of trenches extending through the interlayer dielectric layer to the semiconductor substrate and comprising a first trench of a PMOS device and a second trench of an NMOS device, a high-k dielectric layer on a bottom and sidewalls of the trenches, a PMOS work function adjustment layer on the high-k dielectric layer in the first trench, an NMOS work function adjustment layer on the high-k dielectric layer in the second trench, and a metal electrode layer on the PMOS work function adjustment layer in the first trench and on the NMOS work function adjustment layer in the second trench.