Wettable Lead Flanks for Oxidation-Resistant Semiconductor Packages
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor packages, such as QFN and DFN micro lead packages, suffer from oxidation of exposed copper end surfaces, leading to degraded solder connection quality and the need for expensive and complex automatic X-ray inspection (AXI).
Innovation Solution
The semiconductor package features wettable, metal-plated end surfaces on its leads and tie bars, eliminating the need for AXI by allowing for quality inspection using less expensive automatic optical inspection (AOI) and improving board level reliability (BLR).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional QFN and DFN packages use exposed copper end surfaces after singulation or punching, then manufacturing is simpler and cost-effective, but oxidation occurs over time degrading solder connection quality
Solution Approach 1:
The patent applies metal plating to the end surfaces of leads before the singulation or punching process. This preliminary plating action ensures that the copper surfaces are protected against oxidation before exposure, eliminating the need for post-processing inspection and rework while maintaining reliable solder connections
Solution Approach 2:
The patent converts the potentially harmful oxidation process into a beneficial protective layer by applying metal plating (such as tin, nickel, or zinc) that not only prevents oxidation but also enhances solder wettability and connection reliability. The plating layer transforms the vulnerable copper surface into a protected, solder-friendly surface
2Reliability
If metal plating is applied to all lead surfaces including tie bars, then oxidation is completely prevented, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent applies metal plating selectively only to the end surfaces of leads that will be soldered to the PCB, while leaving the tie bars and other internal structures unplated. This localized plating approach provides oxidation protection exactly where needed for solder connections without the additional cost and complexity of plating all surfaces
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents oxidation of lead surfaces, enhances solder connection quality, reduces inspection costs by using AOI instead of AXI, and improves the reliability of the semiconductor package at the board level.
Implementation Method 1
A respective end surface of each lead of the first plurality of leads, the additional one or more leads, and the second plurality of leads is plated with a metal
Data Source
AI summary
A semiconductor package includes a lead frame, a chip, and a molding encapsulation. The lead frame comprises a die paddle, a first plurality of leads, additional one or more leads, a second plurality of leads, a first tie bar, a second tie bar, a third tie bar, and a fourth tie bar. A respective end surface of each lead of the first plurality of leads, the additional one or more leads, and the second plurality of leads is plated with a metal. A respective end surface of the first tie bar, the second tie bar, the third tie bar, and the fourth tie bar is not plated with the metal. A method for fabricating a semiconductor package includes the steps of providing a lead frame array, mounting a chip, forming a molding encapsulation, applying a trimming process, applying a plating process, and applying a singulation process.