Wide-Gate Data Structures for IC Design Information Retention
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Solution Overview
Problem
Current IC design tools lack efficient representations for wide-gates and wide-buses, leading to increased design time and suboptimal quality of results due to the inability to explicitly retain information about multi-input logical operations and multi-bit data units throughout the design flow.
Innovation Solution
The introduction of wide-gate and wide-bus data structures that explicitly represent logical operations with multiple inputs and multi-bit data, respectively, and maintain bidirectional links with individual cell and wire data structures, enabling improved performance and quality of results by retaining this information throughout the IC design flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional IC design tools are used without wide-gate data structures, then the design flow can proceed with standard representations, but the design time increases and the quality of results deteriorates due to loss of information about multi-input logical operations
Solution Approach 1:
The patent segments the IC design representation by introducing distinct wide-gate data structures that separately represent multi-input logical operations, rather than treating all gates uniformly. This segmentation preserves the specific characteristics of wide-gates (gates with more than two inputs) throughout the design flow, preventing information loss while maintaining efficient processing through structured data organization.
Solution Approach 2:
The patent adds a new dimension to the IC design data structure by introducing a wide-gate-specific representation layer that captures multi-input logical operation information. This dimensional enhancement allows the system to retain and manipulate wide-gate information explicitly across different design stages, transforming the flat representation into a multi-layered structure that preserves critical design information.
2Reliability
If wide-gate data structures are introduced to represent multi-input logical operations, then the quality of results improves, but the device complexity increases due to additional data structures and bidirectional links
Solution Approach 1:
The patent creates universal wide-gate data structures that can represent various multi-input logical operations (AND, OR, NAND, NOR, etc.) through a unified framework. This universal representation reduces the need for separate specialized structures for each gate type, thereby improving result quality through consistent information preservation while limiting the increase in overall system complexity through standardization.
Solution Approach 2:
The patent uses copying mechanisms where wide-gate data structures are created as explicit representations of multi-input logical operations, and bidirectional links copy reference information between wide-gate structures and individual cell structures. This copying approach ensures information integrity and improves reliability while managing complexity through efficient reference management rather than redundant full duplications.
3Productivity
If conventional enumeration is performed without wide-gate data structures, then the design can be processed, but the synthesis process loses information about the original multi-input logical operations
Solution Approach 1:
The patent applies preliminary action by creating wide-gate data structures during the enumeration phase, before synthesis begins. This ensures that information about multi-input logical operations is captured and preserved in the enumerated design, allowing the synthesis process to operate on enriched data that maintains awareness of the original wide-gate structures, thereby preventing information loss while enabling efficient synthesis.
4Ease of operation
If bidirectional links are established between wide-gate data structures and individual cell data structures, then information retrieval efficiency improves, but the system complexity increases
Solution Approach 1:
The patent segments the linkage system by creating directed bidirectional links between wide-gate data structures and individual cell data structures. This segmentation allows efficient information retrieval by providing direct access paths in both directions (from wide-gate to cells and from cells to wide-gate) while managing system complexity through structured, localized link management rather than comprehensive system-wide interconnections.
Data Source
AI summary
Systems and techniques are described for designing an integrated circuit (IC). Some embodiments explicitly represent wide-gates as distinct objects in an IC design data model. One or more IC design representations that are used in an IC design flow may natively support such wide-gate objects. These new objects can enable rapid access and preservation of wide-gates, thereby improving the runtime and/or quality of results (QoR) of an IC design system.