Wide-IO NAND In-Memory Prefetch With Secure Address Translation

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Solution Overview

Problem

Data centers struggle to meet the increasing demands for high throughput and low latency memory/storage solutions due to the rapid proliferation of AI workloads, leading to inefficiencies in data movement bandwidth and storage capacity.

Innovation Solution

Implementing secure in-memory data prefetch techniques for wide-IO NAND memory, which involves allocating memory regions, converting memory addresses, and fetching prefetch data based on predicted usage patterns, while managing data protection tables and using dynamic random-access memory data transfer protocols.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data centers increase memory/storage capacity to meet AI workload demands, then storage capacity increases, but data movement bandwidth and access efficiency deteriorate

Engineering Contradiction:

Improvestorage capacityVSAvoiddata movement bandwidth

Core Design Contradiction:

Quantity of substanceVSProductivity

Solution Approach 1:

The system performs preliminary actions by allocating memory regions in advance and predicting future data access patterns. The controller proactively identifies which data will be needed next and prepares it for retrieval before actual access occurs, thus improving data movement efficiency without increasing storage capacity

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The memory system performs self-service through automatic prefetching operations. The controller autonomously monitors access patterns, predicts future needs, and retrieves data without explicit host requests, enabling the system to serve itself and improve overall bandwidth utilization

Inventive Principle:

Principle #25Self-service

2Productivity

If the system increases prefetching operations to improve bandwidth, then data movement efficiency improves, but memory security and data protection deteriorate

Engineering Contradiction:

Improvedata movement bandwidthVSAvoidmemory security

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The system applies local quality by implementing security measures specifically at the memory region level. Each allocated region has its own protection attributes and access controls, allowing prefetching to occur securely within designated boundaries while maintaining overall system security

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The controller acts as an intermediary between the host and memory regions, mediating prefetching operations. It verifies that prefetch requests adhere to security policies and allocation boundaries, thus enabling efficient data movement while maintaining security through controlled intermediary management

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If the system confines prefetch reads within allocated memory regions to enhance security, then memory security improves, but prefetch hit ratios and bandwidth utilization deteriorate

Engineering Contradiction:

Improvememory securityVSAvoidprefetch hit ratio

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The system implements dynamics by making prefetch boundaries adaptive rather than static. The controller dynamically adjusts prefetch operations based on actual access patterns and security constraints, allowing optimal prefetching within allocated regions while maintaining security boundaries

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system uses feedback mechanisms where the controller continuously monitors actual data access patterns and adjusts prefetch strategies accordingly. This feedback loop enables the system to maximize prefetch hit ratios within security-constrained boundaries by learning from actual usage patterns

Inventive Principle:

Principle #23Feedback

4Adaptability or versatility

If the system performs address conversion between different memory types, then memory compatibility and versatility improve, but processing complexity and latency increase

Engineering Contradiction:

Improvememory type compatibilityVSAvoidaddress conversion complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The controller implements universality by handling multiple memory types (DRAM, NAND, etc.) through a unified address conversion mechanism. This multi-functional approach allows the same controller to manage different memory technologies with consistent interface protocols, reducing overall system complexity despite handling diverse memory types

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260037453A1Systems and methods of in-memory prefetch for wide-IO NAND memory

Publication Date: 2026.02.05 SAMSUNG ELECTRONICS CO LTD

AI summary

Provided are systems, methods, and apparatuses for secure in-memory data prefetch for wide-IO NAND memory. In one or more examples, the systems, devices, and methods include allocating a memory region of a first memory type based on an allocation command; receiving, at a controller of the first memory type and from an application of a host, a load instruction configured for a second memory type different from the first memory type; converting a memory address, of the second memory type, from the second memory type to a converted memory address of the first memory type; determining the converted memory address matches a memory address of the memory region; fetching prefetch data from the memory region based on predicting that the application will use the data based on the load instruction; and providing the prefetch data to the application of the host based on the load instruction.