Wide-Voltage Level Shifter Circuit With Reference-Voltage Protection
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Solution Overview
Problem
In advanced MOS technologies with feature sizes below 40 nm, level shifters face challenges in preventing voltage stress damage to devices due to maximum voltage tolerance limitations, especially when handling wide supply voltage ranges in integrated circuits.
Innovation Solution
A level shifter circuit is designed with a strong latch circuit and a weak latch circuit, along with specific input signal write circuits, to shift voltage levels while preventing excessive voltage stress on MOS devices by using reference voltages to protect transistors, allowing the circuit to operate without reprogramming for varying supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a level shifter circuit is designed to handle wide supply voltage ranges (1.8V, 2.5V, 3.3V) in advanced MOS technologies, then the adaptability and versatility of the circuit is improved, but the MOS devices may be damaged due to exceeding maximum voltage stress tolerance
Solution Approach 1:
The patent introduces an intermediary voltage domain with reference voltages (VREF1, VREF2) that act as a mediator between the input voltage domain and the wide supply voltage domain. The level shifter circuit uses these reference voltages to indirectly translate signals from the input domain to the output domain, preventing direct exposure of MOS devices to excessive voltage stress while maintaining the ability to handle wide supply voltage ranges (1.8V, 2.5V, 3.3V). This intermediary approach resolves the contradiction by enabling voltage domain translation without compromising device reliability.
2Reliability
If conventional level shifting approaches are used with voltage level control signals, then the circuit can be configured to prevent MOS device damage, but the device complexity and difficulty of providing required control signals to each buffer increases
Solution Approach 1:
The level shifter circuit is designed to automatically configure itself based on the provided supply voltage levels without requiring external voltage level control signals for each buffer. The circuit inherently adapts to the wide supply voltage range (1.8V, 2.5V, 3.3V) and automatically prevents MOS device damage through its architecture that uses reference voltages as intermediaries. This self-configuration capability resolves the contradiction by eliminating the need for complex external control signal management while maintaining reliable MOS device protection.
Data Source
AI summary
A level shifter circuit is configured to receive first and second complementary input signals. Each of the first and second complementary input signals have a value of either a first supply voltage or a first reference voltage. The level shifter further includes a strong latch circuit operable in response to the first and second complementary input signals to drive one of first and second output signals to a second supply voltage and includes a weak latch circuit operable to drive the other of the first and second output signals to a second reference voltage.