Wide-Band Buffer Driver With AC Coupling for III-V SMPAs

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge lies in designing a digital buffer that can efficiently drive high input parasitic capacitance in switching mode power amplifiers (SMPAs) using III-V transistors, which operate in depletion mode and lack complementary transistors, making it difficult to implement push-pull digital inverter buffers, especially with varying duty-cycle input signals, and requiring a wide-band digital III-V driver to avoid distortion of RF PWM-PPM signals.

Innovation Solution

A buffer circuit is designed using III-V substrates with depletion mode transistors, featuring pull-up and pull-down circuits with coupling capacitors and bias resistors to shift signal levels, and DC tracking circuits to dynamically adjust bias voltages based on pulse widths, allowing the buffer to operate effectively with complementary signals from CMOS drivers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If III-V depletion mode transistors are used to drive high input parasitic capacitance in SMPAs, then the transistor can be fully switched from on to off state achieving high drain efficiency, but the lack of complementary transistors makes it difficult to implement push-pull digital inverter buffers

Engineering Contradiction:
Improvetransistor switching reliabilityVSAvoidbuffer circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer circuit is segmented into separate pull-up and pull-down paths, each controlled by independent switching signals. This segmentation allows the circuit to function as a push-pull buffer despite using only depletion mode transistors, as each path can be independently optimized for its specific function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit employs dynamic control of the pull-up and pull-down paths through complementary switching signals. By dynamically enabling and disabling each path based on the input signal state, the circuit achieves efficient push-pull operation without requiring complementary transistor types.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If CMOS technology is used to produce digital switching pulses, then the circuit can operate at lower voltage ranges, but the voltage levels are incompatible with III-V technology voltages requiring level shifting

Engineering Contradiction:
Improveenergy efficiencyVSAvoidinterface circuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The coupling capacitor acts as an intermediary element between the CMOS driver and III-V buffer stages. It blocks DC voltage level differences while allowing AC signal transmission, effectively mediating the interface between incompatible voltage domains without requiring complex level shifting circuitry.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The DC voltage level information is extracted and blocked from passing between stages, while only the essential AC signal information is transmitted. This extraction of the problematic DC component simplifies the interface design by eliminating the need for complex level adaptation circuits.

Inventive Principle:
Principle #2Taking out (Extraction)

3Shape

If RF PWM-PPM signals with harmonic content are transmitted, then reasonable pulse shape is achieved, but distortion occurs without wide-band operation up to five times the fundamental frequency

Engineering Contradiction:
Improvepulse shape qualityVSAvoidbandwidth requirement
Core Design Contradiction:
ShapeVSSpeed

Solution Approach 1:

The buffer circuit is designed with wide-band capability from the outset, anticipating the need to preserve harmonic content. By pre-configuring the circuit to operate bandwidths up to five times the fundamental frequency, the circuit is prepared to handle the full spectral content of PWM-PPM signals without subsequent distortion.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The circuit parameters, particularly the transistor dimensions and biasing conditions, are optimized to maintain low output impedance and high bandwidth across the extended frequency range. This parameter optimization ensures that harmonic frequencies are transmitted with minimal attenuation or distortion.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10411706B1Wide-band digital buffer driver
Publication Date: 2019.09.10 THE GOVERNMENT OF THE UNITED STATES AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE
  • US10411706B1 patent drawing
  • US10411706B1 patent drawing
  • US10411706B1 patent drawing

AI summary

A wide-band digital buffer formed in a III-V substrate including a first transistor, a second transistor, a pull-up circuit shifts a t signal to a level of the first transistor. A first capacitor receives the signal, and passes at least a portion of the AC component of the signal to the first transistor. A resistor receives a first bias voltage, and passes it to the first transistor. A pull-down circuit shifts a second signal to a level of the second transistor. A second capacitor receives the second signal, and passes at least a portion of the AC component of the second signal to the second transistor. A second resistor receives a second bias voltage, and passes it to the second transistor.