Window Substrate Conductive Foil Packaging for High-Data-Rate DRAM
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Solution Overview
Problem
Traditional window ball grid array (wBGA) packages using bonding wires are unable to handle high data rates, such as those required by DDR5 SDRAM, and the transition to flip-chip BGA packages involves an additional semiconductor process step, increasing cycle time and cost due to the formation of copper pillars.
Innovation Solution
A semiconductor package design featuring a substrate with a window and conductive foil extending beyond its inner sidewall, where the semiconductor chip is electrically connected to the conductive foil without bonding wires or copper pillars, using a manufacturing method that includes forming a window in the substrate, attaching the substrate to the chip, and soldering the conductive foil to the chip's bonding pad.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If bonding wires are used to electrically connect DRAM chip and PCB substrate, then the package structure is simple, but the package cannot work at high data rate (8000 MHz)
Solution Approach 1:
The patent removes bonding wires from the electrical connection path between the DRAM chip and PCB substrate. Instead, it uses a conductive foil integrated into the substrate that directly contacts the chip's bonding pads, eliminating the inductive effects of bonding wires and enabling high data rate operation.
Solution Approach 2:
The patent introduces a conductive foil as an intermediary element between the substrate and the semiconductor chip. This conductive foil serves as both the electrical connection medium and part of the packaging structure, replacing the traditional bonding wire connection method.
2Speed
If flip-chip BGA package is used to achieve high data rate, then the package can work at high data rate, but additional copper pillar formation process is required which increases cycle time and cost
Solution Approach 1:
The substrate serves multiple functions: it provides mechanical support, electrical connection through the conductive foil, and packaging structure. The conductive foil simultaneously acts as both the electrical interconnect and an integral part of the substrate assembly, eliminating the need for separate copper pillar formation processes.
Solution Approach 2:
The patent merges the electrical connection function with the substrate structure by integrating the conductive foil into the substrate itself. This combination eliminates the need for separate copper pillar formation and bonding processes, reducing packaging cycle time while maintaining high data rate capability.
3Speed
If flip-chip BGA package is used to achieve high data rate, then the package can work at high data rate, but the cost in the packaging process increases due to additional process steps
Solution Approach 1:
The substrate serves multiple functions: it provides mechanical support, electrical connection through the conductive foil, and packaging structure. The conductive foil simultaneously acts as both the electrical interconnect and part of the substrate assembly, eliminating the need for separate copper pillar formation processes.
Solution Approach 2:
The patent merges the electrical connection function with the substrate structure by integrating the conductive foil into the substrate itself. This combination eliminates the need for separate copper pillar formation and bonding processes, reducing packaging cycle time and cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high data rate operation without bonding wires or copper pillars, reducing manufacturing cycle time and cost by eliminating the need for copper pillar formation in the packaging process.
Implementation Method 1
soldering the conductive foil of the substrate to a bonding pad of the semiconductor chip such that the bonding pad of the semiconductor chip is electrically connected to the conductive foil
Data Source
AI summary
The present disclosure is related to a semiconductor package. The semiconductor package includes a substrate and a semiconductor chip. The substrate includes a window through a center portion of the substrate, in which the substrate has an inner sidewall surrounding the window and a conductive foil located on a top surface of the substrate, in which the conductive foil extends beyond the inner sidewall of the substrate. The semiconductor chip is located on the top surface of the substrate, in which the conductive foil is located between the substrate and the semiconductor chip, and the semiconductor chip has a bonding pad electrically connected to the conductive foil.