Windowed Package Structure for Wire-Bonded DDR5 Chip Connections
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Solution Overview
Problem
The formation of copper pillar bumps for connecting chips to substrates in DDR5 DRAM package structures is time-consuming, and changing chip types results in failed connections due to mismatched conductive pads and wires.
Innovation Solution
A package structure is formed by using a first substrate with a window, a second substrate spaced from the first, and a chip with conductive pads, connected by wires through an attach film and molding compound, eliminating the need for copper pillar bumps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper pillar bumps are formed for connecting chips to substrates, then reliable electrical connections are achieved, but manufacturing time increases significantly
Solution Approach 1:
A second substrate is introduced as an intermediary component between the first substrate and the chip. This intermediate substrate provides alternative connection paths through its conductive pads and wires, eliminating the need for time-consuming copper pillar bump formation while maintaining reliable electrical connections through the wire-based interconnect structure
2Productivity
If copper pillar bumps are used for connection, then electrical connectivity is established, but the process is time-consuming and inflexible
Solution Approach 1:
The connection system is segmented into multiple independent components: first substrate, second substrate, conductive pads, and wires. This segmentation allows the second substrate to be independently configured with different wire connections and pad arrangements, enabling rapid adaptation to different chip types without reworking the entire package structure
Solution Approach 2:
The wire-based connection system provides dynamic flexibility compared to fixed copper pillar bumps. The wires can be routed and connected in different configurations to accommodate various chip types and pinouts, making the package structure adaptable to different memory chip specifications and types
Data Source
AI summary
A package structure includes a first substrate, a second substrate, a chip, a first wire and a second wire. The first substrate includes a top surface, a bottom surface, a window and a first conductive pad. The bottom surface of the first substrate is opposite to the top surface. The window communicates the top surface and the bottom surface. The first conductive pad is located over the bottom surface. The second substrate is located over the first substrate. The second substrate is spaced from the first substrate and includes a second conductive pad facing the top surface of the first substrate and exposed from the window. The chip is located over the second substrate. The first wire connects the first conductive pad to the second conductive pad. The second wire connects the second conductive pad to the third conductive pad.