Wire Bonding for High-Frequency Crosstalk Reduction

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Solution Overview

Problem

Wire bonding is not suitable for high-frequency applications above 2 GHz due to crosstalk issues, making it expensive and less preferred compared to flip-chip packaging.

Innovation Solution

The method involves arranging semiconductor die pads in multiple rows with high-frequency I/O pads positioned in the outermost row and corresponding wedges in the innermost row, using lowest-tiered bond wires to connect them, minimizing bond wire lengths and reducing crosstalk.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If wire bonding is used for high-frequency applications, then manufacturing cost is reduced, but crosstalk increases making it unsuitable for frequencies above 2 GHz

Engineering Contradiction:
Improvemanufacturing costVSAvoidcrosstalk
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The bond wires are segmented into multiple tiers or levels. High-frequency I/O pads are connected via lowest-tier bond wires that are positioned to minimize loop height and length, while other pads use higher-tier connections. This segmentation allows different wire paths to be optimized for different signal types, reducing crosstalk between high-frequency signals while maintaining the cost benefits of wire bonding.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical dimension to wire bonding by using multiple tiers of bond wires at different heights above the substrate. This multi-tier configuration allows high-frequency signals to be routed on the lowest tier with minimal loop height, separating them spatially from other bond wires and reducing electromagnetic coupling and crosstalk, thereby enabling wire bonding to handle frequencies above 2 GHz.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of moving object

If multi-row pads are used to reduce semiconductor area, then die size is reduced, but bond wire loop height increases causing more crosstalk

Engineering Contradiction:
Improvesemiconductor areaVSAvoidcrosstalk
Core Design Contradiction:
Area of moving objectVSObject-affected harmful factors

Solution Approach 1:

Pads are segmented into different rows or tiers based on their signal type and connection requirements. High-frequency I/O pads are positioned in specific rows that enable connection via lowest-tier bond wires with minimal loop height. This segmentation allows the die to accommodate multiple rows of pads for area efficiency while ensuring that critical high-frequency connections use optimized short wire paths, reducing crosstalk despite the multi-row configuration.

Inventive Principle:
Principle #1Segmentation

3Object-affected harmful factors

If bond wire length is minimized to reduce crosstalk, then high-frequency performance is improved, but manufacturing tolerances become more difficult to accommodate

Engineering Contradiction:
ImprovecrosstalkVSAvoidwire bonding tolerance
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

By introducing vertical tiering, the patent creates additional spatial dimensions for wire routing. The lowest-tier bond wires provide a controlled, standardized path height that balances short length for low crosstalk with sufficient manufacturing tolerance. The multi-tier structure offers multiple possible connection paths, allowing manufacturing apparatus to select optimal routes that satisfy both electrical performance and tolerance requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7667321B2Wire bonding method and related device for high-frequency applications
Publication Date: 2010.02.23 BELL SEMICONDUCTOR LLC
  • US7667321B2 patent drawing
  • US7667321B2 patent drawing
  • US7667321B2 patent drawing

AI summary

A wire bond circuit device has a circuit die in which substantially all of the input/output (I/O) pads are disposed along the outermost row of pads. A substrate onto which the die is disposed has wedges that are similarly arranged in rows, with the wedges used to carry I/O placed closest to the circuit die. As a result, lowest-tiered bond wire is used to connect the I/O-related pads to their respective wedges.