Wire Bonding for Semiconductor Pitch Transformation
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Solution Overview
Problem
The high cost of metallic leadframes and multi-level substrates hampers the penetration of semiconductor devices with high numbers of input/output terminals into consumer products, as these components are necessary to transform tight chip terminal pitches to more practical device package pitches.
Innovation Solution
A methodology using computer-controlled wire bonding for transforming tight chip terminal pitches to wider package terminal pitches, eliminating the need for leadframes and substrates, by spanning wires across semiconductor wafers to create staggered contact nodes with a larger pitch, which are then embedded in insulating material and filled with conductive material for direct package attachment or modular arrangements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If leadframes or multi-level substrates are used to transform tight chip terminal pitch to wider package pitch, then the pitch transformation is achieved, but the package cost increases significantly
Solution Approach 1:
The patent extracts and eliminates the leadframe or substrate component from the packaging structure, replacing it with direct wire bonding between chips. This removes the expensive intermediate pitch-transformation layer while maintaining the essential function of connecting chip terminals at different pitches through computer-controlled wire spanning across scribe streets
Solution Approach 2:
The patent merges the functions of pitch transformation and electrical interconnection into a single wire bonding process. The bonding wires serve both to electrically connect adjacent chips and to provide the mechanical span across scribe streets that achieves pitch transformation, eliminating the need for separate leadframe or substrate structures
2Manufacturing precision
If leadframes and substrates are used for pitch expansion, then terminal pitch is widened, but device complexity increases
Solution Approach 1:
The patent removes the complex multi-level substrate structure or leadframe assembly from the packaging, replacing it with a simplified direct-wire-bonding approach between adjacent chips on the wafer, thereby reducing structural complexity while maintaining pitch expansion capability
Solution Approach 2:
Instead of using an intermediate substrate or leadframe to transform pitch from narrow to wide, the patent inverts the approach by directly spanning wires across the scribe streets at the original wafer level, achieving pitch transformation through the wire spans themselves rather than through an intermediate structure
Data Source
AI summary
A packaged semiconductor device (100) comprising a semiconductor chip (101) of an area having a first surface (101a) including a plurality of bond pads (102) linearly arrayed, adjacent pads having a first pitch (103) center-to-center; an insulating layer (110) on the first chip surface covering the chip area, the layer having a height (116) and a second surface (110a) parallel to the first surface; the second surface including contact nodes (120) in staggered array, the nodes having the same plurality as the pads, adjacent nodes having a second pitch (121) center-to-center greater than the first pitch; and metal wires through the layer height connecting the pads to respective nodes.