Wirebondable Interposer for Flip Chip Die Compatibility
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Solution Overview
Problem
Existing integrated circuit (IC) dies configured for flip chip mounting are not compatible with wirebonding, and vice versa, due to differences in contact pad materials and substrate layouts, making it costly and time-consuming to redesign a flip chip die for wirebondable compatibility.
Innovation Solution
A method and apparatus are described to convert a flip chip IC die into a wirebondable component by mounting the IC die to a patterned electrically conductive layer of an interposer, which has wirebond pads on its opposite surface, allowing for electrical communication with external substrates designed for wirebonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a flip chip IC die is used with its contact pads configured for solder bumps or copper pillars, then the IC die can be mounted to an external substrate using flip chip mounting, but the contact pad material is not suitable for wire bonding
Solution Approach 1:
An interposer is introduced as an intermediary component between the flip chip IC die and the external substrate. The interposer has a first surface that interfaces with the IC die contact pads (compatible with solder bumps or copper pillars) and a second surface with wirebond pads (compatible with wire bonding). This mediator enables the IC die to be connected to wirebond-compatible substrates without modifying the IC die itself.
2Adaptability or versatility
If the electrical contact pads on the external substrate are distributed outside the footprint of the IC die for wirebonding, then wire bonds can establish electrical connections, but the contact pads do not overlap with the flip chip IC die contact pads
Solution Approach 1:
The interposer serves as a mediator that reconciles the layout incompatibility between flip chip IC dies and wirebond-compatible substrates. The interposer's first surface has contact pads that align with the IC die footprint for flip chip mounting, while the second surface has wirebond pads distributed outside the IC die footprint for wire bonding. This resolves the contradiction by providing an intermediate interface layer.
Solution Approach 2:
The solution moves the wirebond pads to a different spatial dimension - specifically, to the opposite surface of the interposer. This allows the wirebond pads to be positioned outside the IC die footprint on the second surface while maintaining proper alignment on the first surface, effectively resolving the layout conflict by utilizing the third dimension (depth/thickness of the interposer).
3Adaptability or versatility
If a flip chip IC die is redesigned to be wirebondable, then compatibility with wirebonding can be achieved, but the redesign process is time consuming and expensive
Solution Approach 1:
Instead of redesigning the IC die, an interposer is introduced as an intermediary component. The interposer provides the wirebond-compatible interface while the original IC die remains unchanged. This approach avoids the time-consuming and expensive redesign process by externalizing the compatibility adaptation to a separate component.
Solution Approach 2:
The system is segmented into three separate components: the original IC die (unchanged), the interposer (providing interface adaptation), and the external substrate. This segmentation allows the IC die to maintain its original design while the interposer handles the wirebond compatibility requirements, eliminating the need to modify the IC die itself.
Data Source
AI summary
A variety of methods and arrangements to convert a flip chip IC die package into a wirebondable component using an interposer are described. The interposer has an insulating layer and a patterned metal layer attached to one side of the insulating layer. The patterned metal layer is electrically connected to the IC die using solder bumps. The interposer has wirebond pads on a side of the interposer opposed to the side of the interposer having the electrical connection between the IC die and solder bumps. The interposer may be a thin organic laminate or a flexible printed circuit board.