Wired-OR Abnormality Detector for Printed Board Signal Monitoring
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional electronic devices require an increasing number of signal lines to detect abnormalities across multiple printed boards, leading to a more complex configuration and potential erroneous detections due to noise and voltage fluctuations.
Innovation Solution
The implementation of an abnormality detector that uses wired-OR connected signal lines to convert digital abnormality signals into voltage signals, allowing identification of abnormality positions and masking subsequent abnormalities after a predetermined period to prevent erroneous detection, thereby reducing the number of required signal lines and minimizing noise interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of printed boards as detection targets is increased, then the coverage of abnormality detection is improved, but the number of signal lines required increases
Solution Approach 1:
Multiple abnormality signals from different printed boards are merged into a single signal line through wired-OR connection. When any abnormality signal is asserted (goes high), the combined signal reflects this state, allowing multiple detection targets to be monitored through one line rather than requiring separate lines for each board.
Solution Approach 2:
The patent transforms digital abnormality signals into voltage signals for processing. By converting the digital state (high/low) into voltage levels and using a timer circuit to generate mask signals based on time parameters, the system can distinguish between simultaneous and sequential abnormalities, enabling reduced wiring while maintaining detection capability.
2Device complexity
If wired-OR connected signal lines are used to reduce the number of signal lines, then the wiring complexity is reduced, but erroneous detections due to noise and voltage fluctuations may occur
Solution Approach 1:
The timer circuit generates a mask signal in advance when an abnormality is detected. This mask signal is prepared before potential noise or voltage fluctuations could cause false readings, and is used to disable subsequent abnormality detections during the masking period, thereby preventing erroneous detections while using the simplified wired-OR connection.
Solution Approach 2:
The system uses the output of the timer circuit as feedback to control the abnormality detection process. When an abnormality is detected, the timer generates a mask signal that feeds back to disable further detections until the mask period expires, creating a self-regulating mechanism that prevents noise-induced false positives while maintaining the reduced wiring architecture.
3Adaptability or versatility
If multiple abnormalities occur simultaneously, then the detection coverage is comprehensive, but it becomes difficult to identify the initial abnormality position
Solution Approach 1:
The timer circuit introduces a time-based periodic action by generating mask signals with specific durations. When abnormalities occur, the timer creates a temporal window (mask period) during which only the first detected abnormality is recorded. This time-structured approach allows the system to comprehensively monitor multiple boards while preserving information about which abnormality occurred first, solving the information loss problem.
Data Source
AI summary
An abnormal state latch unit comprises: an detection circuit that masks an abnormality position signal; a timer circuit that starts motion when the abnormality position signal indicates the occurrence of an abnormality based on the abnormality position signal, and completes the motion and outputs a reset signal after passage of a predetermined period; and a latch circuit that latches the abnormality position signal output from the detection circuit when the reset signal is output. The detection circuit masks the abnormality position signal when the latch circuit makes latching motion to disable an output from the detection circuit. The timer circuit masks an input to the timer circuit when the latch circuit makes the latching motion to maintain a state indicating completion of the motion. Abnormality voltage signals generated by an signal generation circuit are wired-OR connected and supplied through a single signal line to a monitor circuit.