Wirelength Threshold Layer Assignment for EDA Routing
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Solution Overview
Problem
Conventional layer assignment in electronic design automation (EDA) often results in congestion, design rule violations, and timing issues due to excessive routing on low layers, which can lead to electromigration violations and increased via delays, while pushing wires to high layers exacerbates routing congestion.
Innovation Solution
The method involves determining a wirelength threshold for each net in a circuit design based on its characteristics, selectively assigning wires to layers to minimize via count and optimize routing, thereby avoiding unnecessary assignment to low layers and reducing electromigration violations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional layer assignment pushes more nets to low layers to reduce via costs, then via count is reduced, but routing congestion and electromigration violations increase
Solution Approach 1:
The patent applies local quality by differentiating layer assignment strategies based on net characteristics. Short nets are assigned to low layers to minimize via count, while long nets are assigned to high layers to prevent electromigration violations and routing congestion. This localized differentiation resolves the contradiction by optimizing via usage where applicable while avoiding harmful effects in other contexts.
Solution Approach 2:
The patent introduces wirelength as a critical parameter for layer assignment decisions. By changing the assignment criterion from solely via cost minimization to considering wirelength thresholds, the system dynamically adjusts layer selection based on net length characteristics, thereby resolving the contradiction between via reduction and electromigration prevention.
2Quantity of substance
If conventional layer assignment pushes more nets to low layers to reduce via costs, then via count is reduced, but routing congestion on low layers increases
Solution Approach 1:
The patent applies local quality by differentiating layer assignment strategies based on net characteristics. Short nets are assigned to low layers to minimize via count, while long nets are assigned to high layers to prevent electromigration violations and routing congestion. This localized differentiation resolves the contradiction by optimizing via usage where applicable while avoiding harmful effects in other contexts.
Solution Approach 2:
The patent resolves routing congestion by utilizing the vertical dimension (multiple layers) more effectively. Instead of overloading low layers with all nets, the system distributes long nets to high layers, thereby balancing the routing load across different vertical dimensions and preventing congestion on any single layer.
3Reliability
If layer assignment pushes a large number of wires to high layers, then electromigration violations are reduced, but via count increases and timing effects worsen
Solution Approach 1:
The patent applies local quality by differentiating layer assignment strategies based on net characteristics. Short nets are assigned to low layers to minimize via count, while long nets are assigned to high layers to prevent electromigration violations and routing congestion. This localized differentiation resolves the contradiction by optimizing via usage where applicable while avoiding harmful effects in other contexts.
Solution Approach 2:
The patent introduces wirelength as a critical parameter for layer assignment decisions. By changing the assignment criterion from solely via cost minimization to considering wirelength thresholds, the system dynamically adjusts layer selection based on net length characteristics, thereby resolving the contradiction between via reduction and electromigration prevention.
4Use of energy by moving object
If sink side is assigned on low layers to facilitate lower power consumption, then power consumption is reduced, but short nets suffer from increased via delays
Solution Approach 1:
The patent applies local quality by differentiating layer assignment strategies based on net characteristics. Short nets are assigned to low layers to minimize via count, while long nets are assigned to high layers to prevent electromigration violations and routing congestion. This localized differentiation resolves the contradiction by optimizing via usage where applicable while avoiding harmful effects in other contexts.
Data Source
AI summary
Various embodiments provide for layer assignment of a network of a circuit design based on a wirelength threshold, which can facilitate consideration of timing and electromigration and which may be part of electronic design automation (EDA) of a circuit design. More particularly, some embodiments determine (e.g., calculate) a wirelength threshold for a net (e.g., each net) of a circuit design based on one or more characteristics of the net, and select a layer for at least a portion of the net based on the wirelength threshold.


