Bit Mapping in Wireless Modulation for Lower Bit Error Rate
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Solution Overview
Problem
Current wireless communications systems face challenges in achieving low delay and low bit error rates due to the reliability differences between bit locations in higher order modulation symbols, leading to increased bit error rates and transmission delays.
Innovation Solution
A data processing method that prioritizes bit fields based on reliability levels within modulation symbols, where important bit fields are mapped to high-reliability locations, using a bit mapping method that determines L to-be-sent bits from information and parity bit fields and allocates priorities to ensure optimal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If higher order modulation schemes are used to increase data transmission rate, then productivity is improved, but reliability deteriorates due to increased bit error rate at certain bit locations
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different bit locations within modulation symbols. Specifically, information bits are mapped to bit locations with higher reliability (lower bit error rate), while parity bits are mapped to bit locations with lower reliability (higher bit error rate). This localized optimization ensures that critical information bits are transmitted with higher reliability, resolving the contradiction between using higher order modulation for increased data rate and maintaining overall transmission reliability.
2Productivity
If retransmission packets are merged to improve data throughput, then productivity is improved, but reliability deteriorates due to increased reliability difference between bit locations
Solution Approach 1:
The patent addresses this contradiction by applying local quality to the merged retransmission packets. When multiple retransmission packets are combined, the system identifies and prioritizes information bits, mapping them to high-reliability bit locations in the merged packet. Parity bits from retransmissions are mapped to lower-reliability locations. This approach allows efficient merging of retransmissions for improved throughput while maintaining reliability through differentiated bit location assignment.
Solution Approach 2:
The patent segments the bit fields within modulation symbols into different categories (information bits and parity bits) with different reliability requirements. By segmenting the bit sequence and applying different mapping strategies to different segments, the system can efficiently merge retransmission packets while preserving the reliability of critical information bits, thus resolving the contradiction between throughput improvement and reliability maintenance.
3Reliability
If multiple retransmissions are performed to reduce bit error rate, then reliability is improved, but productivity deteriorates due to increased transmission delay
Solution Approach 1:
The patent applies preliminary action by pre-determining the optimal mapping of information bits to high-reliability bit locations before transmission. This preliminary optimization ensures that the most critical bits are transmitted with maximum reliability from the outset, reducing the likelihood of errors and thereby minimizing the need for retransmissions. This approach improves reliability while avoiding the delay penalties associated with multiple retransmission cycles.
Data Source
AI summary
A data processing method and a data processing apparatus are provided to reduce a bit error rate of a wireless communications system and improve transmission performance of the wireless communications system. The method includes: mapping L to-be-sent bits to L bit locations included in at least one modulation symbol, where the L to-be-sent bits include at least one bit field, a bit in a bit field having a high priority is preferentially mapped to a bit location that is of the at least one modulation symbol and that has a high reliability level, the at least one bit field is at least one of an information bit field, a first parity bit field, and a second parity bit field; and outputting the at least one modulation symbol.