Wireless Semiconductor Chip Power Terminal Layout for Easier Bonding
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Solution Overview
Problem
The manufacturing of semiconductor chip modules with wireless communication is complicated due to the need for precise bonding of power supply lines, which is not addressed in existing technologies.
Innovation Solution
A semiconductor chip design with a processor, a coil for wireless communication, and power supply terminals, where the power supply areas are wider than the terminals, allowing for easier bonding and reduced precision requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If wireless communication is used to reduce the number of communication lines, then the complexity of signal transmission is reduced, but the manufacturing complexity remains high due to precise bonding requirements for power supply lines
Solution Approach 1:
The power supply system is segmented into separate positive and negative electrode power supply areas that are independently bonded to corresponding terminals. This segmentation allows each power supply area to be positioned independently, reducing the overall precision requirement compared to a unified power supply structure.
Solution Approach 2:
The patent applies local quality by making the power supply areas wider than the terminals they connect to. This creates a localized tolerance zone at the bonding interface, where the extended area provides a margin for positioning errors, thereby reducing the precision requirement for chip bonding while maintaining reliable electrical connection.
2Manufacturing precision
If semiconductor chips are bonded at prescribed positions with high precision, then proper power supply connection is achieved, but manufacturing difficulty increases
Solution Approach 1:
The patent changes the geometric parameter of the power supply areas by making them wider than the terminals. This parameter change transforms the bonding interface from a point-to-point connection (requiring high precision) to an area-to-point connection (tolerant to positioning variations), thereby reducing manufacturing difficulty while maintaining connection reliability.
Solution Approach 2:
The extended power supply areas serve as a beforehand cushioning mechanism against positioning errors. By designing the power supply areas to be wider than the terminals in advance, the patent creates a built-in tolerance buffer that compensates for potential bonding position deviations, reducing the need for high precision bonding.
3Reliability
If power supply lines are connected with high precision, then reliable power supply is achieved, but manufacturing cost and complexity increase
Solution Approach 1:
The power supply connection is segmented into separate positive and negative electrode areas, each independently bonded to its corresponding terminal. This segmentation allows for simpler bonding processes compared to connecting multiple fine power lines, reducing manufacturing complexity while maintaining reliable power supply through dedicated bonding areas.
Solution Approach 2:
By providing localized extended power supply areas at the bonding interfaces, the patent ensures reliable power supply connection without requiring high precision across the entire chip. The local quality enhancement is concentrated only at the bonding interfaces where it is most needed, keeping overall manufacturing simple and cost-effective.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design simplifies the manufacturing of semiconductor chip modules by enabling easier connection and alignment of power supply areas with terminals, reducing manufacturing complexity and cost.
Implementation Method 1
a coil for performing wireless communication with another semiconductor chip
Data Source
AI summary
A semiconductor chip including a processor, a coil for performing wireless communication with another semiconductor chip, a positive electrode power supply terminal, and a negative electrode power supply terminal. In a material including a positive electrode power supply area and a negative electrode power supply area, the positive electrode power supply area is bonded or abutted against the positive electrode power supply terminal, the negative electrode power supply area is bonded or abutted against the negative electrode power supply terminal, and an area size of at least one of the positive electrode power supply area and the negative electrode power supply area is wider than an area size of an end part of at least one of the positive electrode power supply terminal and the negative electrode power supply terminal.