Wireless Receiver Clock Compensation for BLE Audio Sync

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Solution Overview

Problem

In wireless communication systems, particularly Bluetooth Low Energy (BLE) audio systems, clock drift between audio and wireless subsystems leads to synchronization issues, resulting in audio frame overruns or underruns, and is exacerbated by temperature variations and non-integer clock rate relationships, affecting audio synchronization precision and latency.

Innovation Solution

A wireless receiver device with a clock compensation circuit that adjusts timing signals based on a timing reference from a source device, using drift and phase compensation mechanisms to synchronize audio and wireless clocks, and includes a media content output circuit with a digital-to-analog converter for precise audio output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate clock signals are used for audio and wireless subsystems, then device functionality is improved, but clock drift between subsystems occurs leading to synchronization issues

Engineering Contradiction:
Improvedevice functionalityVSAvoidsynchronization accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the receiver measures the arrival time of timing reference signals from the transmitter and communicates this information back. The transmitter uses this feedback to adjust its timing reference signal generation, creating a closed-loop system that compensates for clock drift between separate audio and wireless subsystems while maintaining their functional independence

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces a timing reference signal as an intermediary between the wireless and audio subsystems. This intermediary signal carries timing information that allows the receiver to measure drift and communicate it back to the transmitter, enabling synchronization without requiring the subsystems to share a common clock source

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If clock rate is increased for higher audio quality, then audio precision is improved, but clock drift and synchronization issues are exacerbated

Engineering Contradiction:
Improveaudio precisionVSAvoidsynchronization stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements dynamic timing adjustment where the transmitter modifies the timing reference signal based on measured drift conditions. The system transitions from static clock rates to dynamic timing adjustments, allowing high audio precision to be maintained while compensating for drift through real-time feedback and adjustment of the timing reference signal

Inventive Principle:
Principle #15Dynamics

3Reliability

If timing synchronization is tightly controlled, then audio frame overrun/underrun is reduced, but system complexity increases

Engineering Contradiction:
Improveaudio frame synchronizationVSAvoidsynchronization system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a self-service synchronization mechanism where the system automatically measures its own timing drift using the feedback loop and autonomously adjusts the timing reference signal without requiring external intervention or complex manual synchronization protocols

Inventive Principle:
Principle #25Self-service

4Reliability

If temperature compensation is implemented, then clock accuracy over time is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improveclock accuracy over timeVSAvoidcompensation circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces physical temperature compensation mechanisms with a software-based feedback system. Instead of using hardware circuits to compensate for temperature effects on clock accuracy, the system uses digital measurement of timing drift and software algorithms to adjust the timing reference signal, reducing hardware complexity while maintaining clock accuracy

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20250260407A1Wireless device clock synchronization
Publication Date: 2025.08.14 SYNAPTICS INC
  • US20250260407A1 patent drawing
  • US20250260407A1 patent drawing
  • US20250260407A1 patent drawing

AI summary

A wireless receiver for receiving and outputting media content received from a wireless transmitter is provided. The wireless receiver may include a receiver circuit, a media content processing circuit, and a media content output circuit to output the prepared digital media data with a defined timing. The wireless receiver may further include a first clock signal generator configured to generate first timing signals for the media content processing circuit and the media content output circuit. The wireless receiver may further include a clock compensation circuit configured to receive a timing reference from a source device, receive and adjust a phase and/or a frequency of the first timing signals, and output adjusted first timing signals. The wireless receiver may further include a second clock signal generator configured to receive the adjusted first timing signals and to output second timing signals for clocking the media content output circuit.