Wireless Clock Synchronization via Timestamp Packet Comparison

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Solution Overview

Problem

Existing wireless communication systems face challenges in ensuring accurate clock synchronization between master and slave network devices, leading to potential connectivity issues and misalignment of wireless signals.

Innovation Solution

A method involving the transmission of synchronization packets and timestamp samples between master and slave network equipment, where control signals and timestamp samples are generated and compared to determine synchronization accuracy, allowing for intermittent verification of clock alignment and detection of missing packets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If clock synchronization operations are performed between master and slave devices, then clock alignment is improved, but measurement precision of synchronization accuracy is insufficient

Engineering Contradiction:
Improveclock synchronization accuracyVSAvoidsynchronization verification capability
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent implements feedback by having the slave device measure the arrival time of synchronization packets using its local clock, compare this with the master device's timestamp, calculate the clock offset, and feed this offset information back to the master device. This enables continuous refinement and verification of synchronization accuracy through repeated measurement and adjustment cycles.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent replaces traditional mechanical or simple electronic clock synchronization methods with a digital measurement system that uses timestamp packets, counters, and digital time difference calculations. This substitution enables precise measurement of synchronization accuracy by converting temporal relationships into digital values that can be accurately compared and verified.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If timestamp packets are transmitted intermittently to verify clock synchronization, then measurement capability is improved, but loss of information may occur

Engineering Contradiction:
Improvesynchronization verification capabilityVSAvoidsynchronization data completeness
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The patent applies preliminary action by having the master device prepare and timestamp synchronization packets in advance before transmission. The master device records the transmission timestamp and includes this information in the packet, so that when the slave device receives and processes the packet, both devices already have the necessary timing information available for immediate comparison and measurement, eliminating the need for additional information exchange.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If continuous synchronization monitoring is implemented, then reliability of wireless connections is improved, but use of energy increases

Engineering Contradiction:
Improvewireless connection stabilityVSAvoidenergy consumption for synchronization
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by transmitting timestamp packets at regular intervals rather than continuously. This allows both devices to maintain synchronization awareness while entering low-power states between packet transmissions. The periodic exchange of timestamp information provides sufficient data to detect drift and maintain reliability without requiring constant active monitoring, thus reducing overall energy consumption.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9288777B2Methods and apparatus for synchronizing clock signals in a wireless system
Publication Date: 2016.03.15 APPLE INC
  • US9288777B2 patent drawing
  • US9288777B2 patent drawing
  • US9288777B2 patent drawing

AI summary

A system for verifying clock synchronization between master and slave network equipment is provided. The master includes a transmitter, first control logic, and a first processor. The slave includes a receiver, second control logic, and a second processor. The transmitter may send synchronization packets to the receiver. When a synchronization packet is sent, the first control logic forwards a first timestamp sample to the first processor. In response to receiving a synchronization packet, the receiver may generate a second timestamp sample that is forwarded to the second processor. When a number of first timestamp samples are collected at the first processor, the transmitter may send a timestamp packet to the receiver. In response to receiving the timestamp packet, the receiver may compare the first and second timestamp samples in an effort to synchronize a slave reference clock in the slave to a master reference clock in the master.