Wireless Clocking Scheme With Local AFC for Stable RF and Baseband Timing

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Solution Overview

Problem

Modern wireless communication devices face challenges in maintaining stable reference frequencies due to temperature dependencies, supply voltage variations, and aging effects, which can disrupt integrated functions like GPS and Bluetooth when a single automatic frequency control (AFC) corrected reference clock is shared across all circuits.

Innovation Solution

A method and system that generate an uncorrected reference clock signal and distribute it to all parts, while applying frequency correction values only where necessary to ensure accurate clocking signals, using a phase-locked loop circuit and timing generator for baseband timing signals, and applying corrections directly to radio frequency and sampling rate converters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an AFC corrected reference clock is shared across all circuits, then frequency stability is improved for the mobile terminal transceiver, but frequency disruptions occur in integrated functions like GPS and Bluetooth

Engineering Contradiction:
Improvefrequency stabilityVSAvoidfrequency disruptions
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the clocking system by providing different reference clock sources to different functional blocks. The mobile terminal transceiver receives an AFC corrected reference clock signal, while integrated functions like GPS and Bluetooth receive an uncorrected reference clock signal from a separate source, preventing frequency disruptions from propagating to all circuits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by tailoring the clock signal characteristics to the specific needs of each functional block. The AFC correction is applied locally only where frequency stability is critical for the transceiver, while other functions maintain their own independent clocking without being affected by correction-induced frequency changes.

Inventive Principle:
Principle #3Local quality

2Device complexity

If a free-running crystal oscillator is used as reference clock, then device complexity is reduced, but frequency stability requirements cannot be met

Engineering Contradiction:
Improveclocking system complexityVSAvoidfrequency stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the clocking system into multiple independent crystal oscillators serving different functions. One crystal oscillator provides the reference clock for the transceiver with AFC correction, while another provides the reference clock for integrated functions, eliminating the need for a single complex clocking system while meeting frequency stability requirements where needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses separate crystal oscillators as independent copies of the reference clock source for different functional blocks. This allows each block to have its own stable frequency reference without requiring a single complex centralized clocking system, maintaining simplicity while achieving frequency stability.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes frequency disruptions to critical functions, maintains stability and accuracy for sensitive components, and avoids the drawbacks of starting phase-locked loops and potential interference, ensuring continuous and accurate clocking without degrading performance.

Implementation Method 1

The method wherein generating said baseband timing signal comprises using a phase-locked loop circuit for generating a phase-locked loop signal based on said uncorrected reference clock signal and said at least one frequency correction value

Methodology Applied
Scientific EffectPhase-locked loop:

Data Source

PatentUS9048978B2Clocking scheme for a wireless communication device
Publication Date: 2015.06.02 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • US9048978B2 patent drawing
  • US9048978B2 patent drawing
  • US9048978B2 patent drawing

AI summary

The invention relates to a method and a system for generating clock signals in a wireless communication device. The method includes generating an uncorrected reference clock signal, generating at least one frequency correction value corresponding to a frequency error in the uncorrected reference clock signal, and generating at least one radio frequency clock signal based on the uncorrected clock signal and the at least one frequency correction value, for receiving and transmitting radio frequency signals. The method further comprise generating, independently of the at least one radio frequency clock signal, a baseband timing signal based on the uncorrected reference clock signal and the at least one frequency correction value, for clocking base-band signal processing circuits.