Wireless Control Circuit Direct Data Transmission
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Solution Overview
Problem
Conventional mobile communication systems face restricted data throughput performance due to the need for frequent write and read operations on external buffering circuits, which are typically implemented with volatile memories, resulting in significant access time and power consumption.
Innovation Solution
The control circuit of the wireless user equipment minimizes access to external buffering circuits by directly transmitting data between layers without intermediate buffering, reducing the number of access operations and enhancing data throughput performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If data is buffered in external buffering circuits and read/write operations are conducted frequently, then data can be stored and retrieved, but access time increases and data throughput performance deteriorates
Solution Approach 1:
The patent merges the buffering function into the control circuit by integrating a buffer memory unit within the control circuit structure. This allows data to be buffered internally during protocol processing without requiring frequent access to external buffering circuits, thereby reducing access time and improving data throughput performance while maintaining the necessary data storage and retrieval capabilities.
2Use of energy by moving object
If external buffering circuits are used for data storage, then data can be retained, but access operations require waiting time and power consumption increases
Solution Approach 1:
The patent combines the buffer memory unit with the control circuit to enable internal data buffering. This integration reduces the frequency of access operations to external buffering circuits, thereby lowering power consumption while maintaining data retention capability through the internal buffer that can hold data during processing operations.
3Productivity
If multiple write and read operations are conducted on external buffering circuits, then data processing can be performed, but data throughput performance is restricted
Solution Approach 1:
The patent integrates a buffer memory unit within the control circuit structure, merging the buffering function with the control logic. This allows data to be written once to the internal buffer and read multiple times during protocol processing without requiring repeated access to external buffering circuits, thereby improving data throughput performance while reducing the number of access operations required.
Data Source
AI summary
A control circuit of a wireless user equipment includes: a PDCP layer computing circuit for reading a PDCP SDU from a PDCP SDU buffer of a memory device of the wireless user equipment, and for generating a ciphered data based on the PDCP SDU; a RLC layer computing circuit for generating a RLC PDU based on the ciphered data; a MAC layer computing circuit for generating a MAC PDU based on the RLC PDU; and a channel encoding circuit for encoding the MAC PDU. The PDCP layer computing circuit directly transmits the ciphered data to the RLC layer computing circuit, the RLC layer computing circuit directly transmits the RLC PDU to the MAC layer computing circuit, and the MAC layer computing circuit directly transmits the MAC PDU to the channel encoding circuit, without buffering above data in any buffering circuit outside the control circuit.