Wireless Decoding with Multi-Stage LLR Saturation for Lower BLER

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Solution Overview

Problem

Existing decoding algorithms for linear error-correcting block codes, such as LDPC codes, exhibit poor performance for small and medium-block length codes, leading to high Block Error Rates (BLER) in wireless communication networks.

Innovation Solution

A multi-stage decoding algorithm is introduced, comprising an input decoding stage, multiple intermediate decoding stages, and an output decoding stage. This algorithm involves selecting bit positions with the smallest absolute Log-Likelihood Ratios (LLRs), assigning maximum LLR values, and forming vectors for parallel decoding runs to improve decoding performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of iterations in the message passing decoding algorithm is increased, then the Block Error Rate (BLER) performance is improved, but the decoding complexity and processing time increase significantly

Engineering Contradiction:
ImproveBlock Error Rate (BLER)VSAvoiddecoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the decoding process into multiple stages: an input stage that processes all bits uniformly, intermediate stages that selectively process only bits with smallest absolute LLR values, and an output stage that processes all bits again. This segmentation allows the algorithm to achieve improved BLER performance without proportionally increasing overall decoding complexity, as intermediate stages focus computational resources only on the most unreliable bits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by differentiating the decoding treatment based on bit reliability. Bits are categorized into different groups: those with smallest absolute LLR values receive enhanced processing in intermediate stages, while other bits receive standard processing. This localized enhancement of decoding quality for critical bits improves overall BLER performance without uniformly increasing complexity across all bits.

Inventive Principle:
Principle #3Local quality

2Reliability

If the number of iterations in the message passing decoding algorithm is increased, then the Block Error Rate (BLER) performance is improved, but the processing time increases

Engineering Contradiction:
ImproveBlock Error Rate (BLER)VSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the decoding process into multiple stages: an input stage that processes all bits uniformly, intermediate stages that selectively process only bits with smallest absolute LLR values, and an output stage that processes all bits again. This segmentation allows the algorithm to achieve improved BLER performance without proportionally increasing overall decoding complexity, as intermediate stages focus computational resources only on the most unreliable bits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by performing enhanced decoding operations only on a subset of bits (those with smallest absolute LLR values) in intermediate stages, rather than processing all bits with the same intensity. This selective approach achieves the necessary BLER improvement while minimizing the increase in processing time, as full decoding iterations are not performed on all bits.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If saturation is applied to bits with smallest absolute LLR values, then the decoding performance for small and medium-block length codes is improved, but the decoding complexity increases

Engineering Contradiction:
Improvedecoding performanceVSAvoiddecoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the decoding process into multiple stages: an input stage that processes all bits uniformly, intermediate stages that selectively process only bits with smallest absolute LLR values, and an output stage that processes all bits again. This segmentation allows the algorithm to achieve improved BLER performance without proportionally increasing overall decoding complexity, as intermediate stages focus computational resources only on the most unreliable bits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by differentiating the decoding treatment based on bit reliability. Bits are categorized into different groups: those with smallest absolute LLR values receive enhanced processing in intermediate stages, while other bits receive standard processing. This localized enhancement of decoding quality for critical bits improves overall BLER performance without uniformly increasing complexity across all bits.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4550671A1Decoding apparatus and method in wireless communication network
Publication Date: 2025.05.07 NOKIA SOLUTIONS & NETWORKS OY
  • EP4550671A1 patent drawingFigure 1
  • EP4550671A1 patent drawingFigure 2A
  • EP4550671A1 patent drawingFigure 2B

AI summary

A multi-stage decoding algorithm for improving the decoding performance of bits encoded with a linear error-correcting block code of small or medium block length is provided. The algorithm comprises an input stage, at least two intermediate stages and an output stage. For each of the stages (except for the last intermediate stage and the output stage), a certain number of bit positions is selected and set to a maximum possible absolute LLR value. The output data of each stage is used to compute the input data of the next stage. Each of the intermediate stages executes a specified number of parallel decoding runs, and the input data for each of the intermediate stages is generated based on the output data of the previous intermediate stage and initial LLRs obtained after demodulation. The bit positions set to the maximum possible absolute LLR value in the previous stage cannot be used again in the next stage. At the output stage, only one decoding run is executed, for which input data are formed based on the initial LLRs and the LLRs obtained at the last intermediate stage.