Wireless Industrial Network Memory Pointer Swapping for Latency Reduction
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Solution Overview
Problem
Traditional communication systems in industrial networks face latency issues due to data copying between protocol stack layers, which is critical in power system automation where low-latency data transfer is essential.
Innovation Solution
A method and device implementing cyclic time-slotted operation with shared memory and alternating pointers between application software and communication hardware, allowing efficient access and minimizing latency while ensuring data consistency and error handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is copied between protocol stack layers (application layer to physical layer and vice versa), then data can be processed and transmitted through the complete protocol stack, but transmission latency increases and time is consumed
Solution Approach 1:
The patent merges the application layer software and physical layer hardware operations into a unified memory space with shared memory areas. The first memory area is accessible by both application software and communication hardware, eliminating the need for traditional data copying between separate memory spaces. This merging reduces transmission latency while maintaining data integrity through coordinated access via first and second pointers that are swapped at cycle boundaries.
2Productivity
If application software and communication hardware share the same memory area, then data access efficiency improves, but data consistency and access conflicts may occur
Solution Approach 1:
The patent implements dynamic pointer swapping between two memory areas (first and second memory areas) at the boundary of each cyclic time slot. During one time slot, the first pointer points to the first memory area while the second pointer points to the second memory area, and vice versa in the next time slot. This dynamic switching allows both application software and communication hardware to access the same physical memory simultaneously without conflicts, maintaining data consistency while maximizing access efficiency.
Solution Approach 2:
The patent segments the shared memory into two distinct memory areas (first memory area and second memory area) that are alternately accessed by application software and communication hardware. This segmentation prevents access conflicts by ensuring that at any given time, the software and hardware are operating on separate memory regions, thereby maintaining data consistency while enabling parallel access operations.
3Loss of time
If cyclic time-slotted operation with pointer swapping is implemented, then latency is reduced and data propagation efficiency improves, but system complexity increases
Solution Approach 1:
The patent implements periodic pointer swapping at fixed time intervals (at the boundary of each cyclic time slot). This periodic action creates a predictable, rhythmic pattern of memory access where the first and second pointers systematically switch between the first and second memory areas. The periodic nature simplifies the management complexity by establishing a regular, easily implementable schedule rather than requiring complex arbitration logic, while still achieving low-latency data propagation.
Data Source
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AI summary
There is provided mechanisms for cyclic time-slotted operation in a wireless industrial network (100). A method is performed by a communication device (200, 300a:300N). The communication device (200, 300a:300N) comprises a memory (500) having a first memory area (510a) and a second memory area (510b). The method comprises running an application software (620) at application layer. The application software (620) is associated with a first pointer (610). The method comprises operating a communication hardware (630) at physical layer. The communication hardware (630) is associated with a second pointer (610b). The first pointer (610) and the second pointer (610b) in a given timeslot point at a respective different one of the memory areas (510a, 510b), such that in said given timeslot the application software (620) is enabled to access one of the memory areas (510a, 510b) and the communication hardware (630) is enabled to access the other of the memory areas (510a, 510b). The method comprises swapping the pointers (610a, 610b) to the memory areas (510a, 510b) at the end of each cycle of the cyclic time-slotted operation