Wireless Node DC Offset Signal Processing for High-Order Modulation
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Solution Overview
Problem
Large array antenna systems face challenges in achieving high capacity and processing speed while maintaining low power consumption and cost, particularly due to the limitations of single-bit analog-to-digital converters (ADCs) that can only support low-density modulation schemes.
Innovation Solution
The introduction of a direct current (DC) offset value to demodulated analog signals before analog-to-digital conversion, allowing low-resolution ADCs to handle higher-order modulation schemes by adjusting the distribution of combined offset values, enabling accurate detection of complex modulation formats without increasing complexity or power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If single-bit ADCs are used to reduce complexity and power consumption, then device complexity and power consumption are reduced, but modulation scheme capability is limited to low-density schemes only
Solution Approach 1:
The patent applies preliminary action by adding a DC offset value to the demodulated analog signal before it enters the single-bit ADC. This pre-processing step modifies the signal distribution to ensure that even with the limited 1-bit resolution, the ADC can accurately detect higher-order modulation schemes. The DC offset is added in advance to compensate for the quantization limitations, enabling the system to support complex modulations like 16-QAM without requiring higher-resolution converters.
2Adaptability or versatility
If high-resolution ADCs are used to support higher-order modulation schemes, then modulation scheme capability is improved, but power consumption and device complexity increase
Solution Approach 1:
The patent applies parameter changes by modifying the statistical distribution of the input signal to the ADC through the addition of a DC offset. Instead of changing the ADC resolution parameter, the system changes the signal parameter (adding offset) to match the ADC's capabilities. This allows the use of low-resolution, low-power ADCs while maintaining support for higher-order modulation schemes, effectively decoupling the ADC resolution requirement from the modulation complexity.
3Productivity
If large array antenna systems are deployed to increase capacity, then communication capacity is improved, but power consumption and system complexity increase
Solution Approach 1:
The patent applies segmentation by dividing the signal processing function across multiple antenna elements in the array, where each element uses a simple single-bit ADC. Instead of using one high-resolution ADC per antenna, the system segments the conversion task into many low-resolution conversions, which are then processed collectively. This approach enables large-scale antenna arrays to be deployed with low-power components, maintaining high communication capacity while minimizing the power consumption that would result from using high-resolution ADCs in each element.
Data Source
AI summary
The present disclosure relates to a wireless communication node comprising at least one array antenna configured to receive a radio signal, said array antenna comprising a plurality of receiving antenna devices, each of said antenna devices being connected to a respective receiving circuit which is configured for processing said radio signal. Each receiving circuit comprises a demodulator, an analog-to-digital converter and a decoder, the demodulator being configured to receive an analog signal from the corresponding receiving antenna device and to output a demodulated analog signal to said analog-to-digital converter which outputs a converted digital signal to the decoder. Furthermore, the node is configured for adding a direct current, DC, offset value to said demodulated analog signal wherein the combined offset values of said node follow a predetermined distribution of values, having a variance, over the analog-to-digital converters.