Wireless Package Structure for Enhanced Thermal Dissipation
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Solution Overview
Problem
The use of bonding wires in chip packaging is prone to issues such as pad cratering, tail inconformity, bending fatigue, vibration fatigue, breakage, and disconnection, which affect the reliability and efficiency of electrical connectivity between integrated circuit dice and external circuitry.
Innovation Solution
A package structure that utilizes an interconnection and redistribution structure without bonding wires, featuring a substrate, die, encapsulators, and redistribution components with metal layers formed by deposition and electroplating processes to achieve electrical connectivity between pads and a leadframe or PCB board, increasing pin pitch and improving heat dissipation while reducing package size and thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding wires are used for electrical connectivity, then electrical connection between die and external circuitry is achieved, but reliability deteriorates due to pad cratering, tail inconformity, bending fatigue, vibration fatigue, breakage, and disconnection
Solution Approach 1:
The patent removes the bonding wire component entirely from the package structure, replacing it with an interconnection structure that integrates electrical connectivity functions directly into the substrate. This extraction eliminates all bonding wire-related defects (pad cratering, tail inconformity, bending fatigue, vibration fatigue, breakage, and disconnection) while maintaining electrical connectivity between the die and external circuitry.
Solution Approach 2:
The patent replaces the mechanical bonding wire system with an integrated interconnection structure that uses electrical and mechanical pathways embedded in the substrate. This substitution eliminates the mechanical vulnerabilities of bonding wires (bending fatigue, vibration fatigue) while achieving the same electrical connectivity function through a more robust integrated architecture.
2Reliability
If traditional package structure is used, then die is protected and connected, but package size and thickness are larger
Solution Approach 1:
The patent merges the interconnection structure and redistribution structure into a single integrated component within the package substrate. This consolidation eliminates the need for separate bonding wires and reduces the number of discrete components, thereby decreasing overall package size and thickness while maintaining die protection and electrical connectivity functions.
Solution Approach 2:
The patent transitions from a three-dimensional layout with bonding wires extending outward to a planar, two-dimensional interconnection structure embedded within the substrate. This dimensional change allows for more efficient space utilization, reducing package thickness and overall volume while maintaining all necessary connectivity and protection functions.
3Reliability
If bonding wires are used, then electrical connectivity is established, but pin pitch is limited
Solution Approach 1:
The patent segments the electrical connectivity function into multiple independent interconnection pathways within the substrate, allowing for increased pin pitch. By distributing connection points across the substrate plane rather than relying on wire extensions, the design achieves higher pin density and larger pin pitch while maintaining reliable electrical connectivity.
Solution Approach 2:
The patent moves electrical connectivity from a linear wire-based approach to a planar substrate-based approach, enabling connections to be made at multiple locations across the substrate surface. This dimensional transition allows for increased pin pitch and higher pin density without compromising connectivity reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the reliability and efficiency of electrical connectivity by eliminating the drawbacks of bonding wires, increasing pin pitch, improving heat dissipation, and reducing package size and thickness, thereby enhancing the overall performance of chip packaging.
Implementation Method 1
metal layers formed by deposition and electroplating processes
Implementation Method 2
metal layers formed by deposition and electroplating processes
Data Source
AI summary
A package structure can include: (i) a substrate having opposite first and second surfaces; (ii) a die having opposite active and back surfaces, where the die is arranged above the first surface of the substrate, the back surface of the die is adjacent to the first surface of the substrate; (iii) pads arranged on the active surface of the die; (iv) a first encapsulator configured to encapsulate the die; (v) an interconnection structure configured to electrically connect to the pads through the first encapsulator; (vi) a second encapsulator configured to encapsulate the interconnection structure; and (vii) a redistribution structure configured to electrically connect to the interconnection structure and to provide external electrical connectivity.