Wireless Peripheral Controller Clock Synchronization
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Solution Overview
Problem
Current wireless peripheral devices experience latency due to a lack of synchronization between wireless data transfer and wired interconnect data transfer, leading to increased data transfer delays between peripheral devices and computer processors, which degrades user experience, especially in applications requiring sharp interactions.
Innovation Solution
A wireless peripheral device controller synchronizes wireless data transfers with host device clocks, using techniques such as time-division multiple access (TDMA) and frequency division multiple access (FDMA) to ensure timely acquisition and transmission of sensor data, reducing latency by aligning data transfer with host device clock cycles and adjusting for clock drift and jitter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If wireless data transfer is used to replace wired connection, then ease of operation and mobility are improved, but data transfer delay and latency increase
Solution Approach 1:
The patent applies preliminary action by having the wireless peripheral device acquire sensor data in advance of when the host device requests it. The endpoint device determines a time to acquire sensor data based on the phase relationship between host device clock and endpoint device clock, ensuring data is ready before the host needs it, thus reducing latency while maintaining wireless mobility
Solution Approach 2:
The patent uses feedback by continuously monitoring the phase relationship between the host device clock signal and the endpoint device clock signal. Based on this feedback, the system dynamically adjusts the timing of sensor data acquisition to synchronize with host device expectations, reducing data transfer delay while maintaining wireless operation
2Speed
If sensor data is acquired in advance to reduce latency, then response time is improved, but synchronization accuracy with host device clock deteriorates due to clock drift and jitter
Solution Approach 1:
The patent applies dynamics by making the data acquisition timing adaptive rather than fixed. The system dynamically adjusts the acquisition time based on the measured phase relationship between clocks, allowing it to respond to clock drift and jitter while maintaining accurate synchronization and fast response times
Solution Approach 2:
The patent changes the timing parameter of sensor data acquisition based on the phase relationship measurement. By adjusting this parameter dynamically according to actual clock synchronization status, the system maintains both fast response and high synchronization accuracy despite clock drift and jitter
3Device complexity
If multiple peripheral devices are connected wirelessly through a single USB dongle, then device complexity is reduced, but data transfer delays increase due to shared communication channel
Solution Approach 1:
The patent applies segmentation by dividing the communication channel into time slots for different peripheral devices. The USB dongle schedules sensor data acquisition from multiple devices at different times based on their respective phase relationships with the host clock, reducing contention and data transfer delays while maintaining a single dongle connection
Solution Approach 2:
The patent uses periodic action by implementing scheduled acquisition cycles for multiple peripheral devices. Each device is assigned periodic time slots for data transfer, creating a structured communication pattern that reduces conflicts and delays while allowing multiple devices to share the single USB dongle connection efficiently
Data Source
AI summary
Examples of techniques for wireless communication are presented. In some examples, an apparatus comprises a wireless transceiver and a hardware processor configured to perform: receiving, from a host device, a first indication of a host device clock signal, the apparatus and the host device being coupled via a wired interconnect; determining, based on the first indication and a second indication of an endpoint device clock signal, a phase relationship between the host device clock signal and the endpoint device clock signal; determining, based at least on the phase relationship, a first time for transmitting a sensor data request to a peripheral device of a computer; transmitting, using the wireless transceiver, the sensor data request to the peripheral device at the first time; receiving, from the peripheral device, the sensor data; and providing the sensor data to the host device via the wired interconnect as input data to the computer.