Wireless Receiver Orthogonal Coding for Lower-Rate Signal Processing

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Solution Overview

Problem

Existing wireless receiver systems face challenges in processing high code rate signals, requiring increased hardware and software processing speeds, which can strain resources and lead to higher power consumption and complex synchronization processes.

Innovation Solution

The implementation of a wireless receiver and wireline communication system using a variable leading element orthogonal coding scheme, which encodes and decodes signals to reduce processing speeds, lower bandwidth requirements, and simplify synchronization, by employing a programmable leading element in the orthogonal coding scheme.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high code rate encoding is used to combine multiple analog signals, then signal reliability and interference resistance are improved, but hardware and software processing speed requirements increase

Engineering Contradiction:
Improvesignal reliabilityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent segments the high code rate signal processing into multiple lower-rate parallel processing paths by using code division multiplexing. Multiple analog signals are encoded with orthogonal codes and processed separately at lower rates, then combined at the output, avoiding the need for high-speed processing of a single high code rate signal stream.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces orthogonal codes as an intermediary mechanism that enables multiple signals to share the same transmission medium at different code rates. The orthogonal codes act as a mediator that allows lower-speed processing paths to achieve the equivalent of high-speed combined signal processing through code-based signal separation and combination.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If high code rate encoding is used to combine multiple analog signals, then interference resistance is improved, but power consumption increases

Engineering Contradiction:
Improveinterference resistanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent divides the power consumption burden by segmenting the signal processing into multiple lower-rate parallel paths using orthogonal codes. Each processing path operates at a lower rate and consumes less power, while the orthogonal code structure maintains the interference resistance benefits of high code rate encoding through code-based signal separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the processing parameter from high code rate to multiple lower code rates by using code division multiplexing. This parameter change allows the system to maintain interference resistance through orthogonal code structure while reducing the processing speed and power consumption requirements of individual processing paths.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If high sampling rate ADCs are deployed to process high code rate signals, then signal processing capability is improved, but hardware complexity and resource strain increase

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the high sampling rate requirement into multiple lower sampling rate ADCs by using orthogonal code division. Each ADC processes a lower-rate signal path, reducing individual ADC complexity and resource requirements while maintaining overall signal processing capability through parallel processing of multiple coded signal streams.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11463294B2System and method for wireless receiver communication based on variable leading bit orthogonal code sets
Publication Date: 2022.10.04 HUAWEI TECH CO LTD
  • US11463294B2 patent drawing
  • US11463294B2 patent drawing
  • US11463294B2 patent drawing

AI summary

The disclosed systems, structures, and methods are directed to a wireless receiver. The configurations presented herein employ a signal encoder configured to encode a plurality of received analog signals into a single encoded analog composite signal, in accordance with a variable leading bit orthogonal coding scheme, an analog-to-digital converter (ADC) configured to convert the single encoded analog composite signal into a single encoded digital composite signal containing constituent digital signals, a synchronization module configured to provide the variable leading bit orthogonal coding scheme to the signal encoder, and a signal decoder configured to decode the single encoded digital composite signal in accordance with the variable leading bit orthogonal coding scheme, to output a plurality of digital signals containing the desired information content of the received plurality of analog signals.