Wireless Trigger Detection Using Correlation and Parallel Bit Matching
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Solution Overview
Problem
Wireless devices face challenges in efficiently detecting trigger waveforms due to high power consumption and latency in determining if a received waveform is addressed to them, especially when multiple devices are within communication range.
Innovation Solution
The implementation of a correlation circuit to correlate received waveforms with target waveforms, a demodulation circuit to generate bit sequences, and a comparison circuit to compare circularly rotated versions of target sequences with demodulated bits, reducing the time and power required for trigger detection by using parallel processing and efficient scanning techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional trigger detection methods are used to ensure reliable connection establishment, then connection reliability is improved, but power consumption increases and latency increases
Solution Approach 1:
The trigger detection process is segmented into multiple stages: initial correlation check, threshold comparison, and detailed address matching. This segmentation allows the system to quickly eliminate non-matching triggers without performing full address comparison, thereby reducing power consumption while maintaining reliable detection of valid triggers
Solution Approach 2:
The system performs preliminary correlation checks and threshold comparisons before committing to full address matching. By conducting these preliminary actions first, the system can identify and process only promising candidates, reducing overall power consumption while ensuring reliable connection establishment
2Reliability
If traditional trigger detection methods are used to ensure reliable connection establishment, then connection reliability is improved, but latency increases
Solution Approach 1:
The detection process is divided into rapid initial correlation checks followed by detailed address matching only for promising candidates. This segmentation reduces latency by quickly filtering out non-matching triggers before performing computationally intensive address comparisons
Solution Approach 2:
Preliminary correlation and threshold checks are performed before full address matching to quickly identify valid triggers. This preliminary action reduces latency by avoiding unnecessary detailed comparisons of invalid triggers while ensuring reliable detection of valid ones
3Productivity
If parallel processing is implemented to reduce latency and power consumption, then processing speed is improved, but device complexity increases
Solution Approach 1:
The parallel processing architecture is segmented into distinct functional blocks (correlation circuit, comparison circuit, threshold logic) that can be independently implemented and optimized. This segmentation reduces device complexity by allowing each component to be designed and manufactured separately while maintaining high processing speed through parallel operation
Data Source
AI summary
Systems and apparatus are disclosed for a target device to detect a trigger from an initiating device. One implementation includes a wireless device configured to correlate a received waveform with a target waveform, compare a result of the correlation to a threshold and output a first signal based on the comparison of the result and the threshold. The apparatus may also be configured to generate a sequence of bits by demodulating at least a portion of the received waveform in response to receiving the first signal, to compare in parallel a plurality of circularly rotated versions of a target sequence of bits with the demodulated sequence of bits, and to combine the results of the comparisons and output a second signal when the combined comparisons indicate that the demodulated sequence of bits corresponds to the target sequence of bits.