Wiring on Array Impedance Matching for Display Signal Integrity

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Solution Overview

Problem

The impedance difference between signal wires on circuit boards, particularly in TFT-LCD wiring designs, leads to signal delays and display issues like split-screen phenomena and mura, which are not effectively addressed by existing methods that rely heavily on copper and length adjustments, increasing costs.

Innovation Solution

A display device with a wiring on array comprising signal wires of the same impedance but different lengths and cross-sectional areas, allowing for the selection of any conductive material, thereby reducing impedance differences and optimizing signal transmission without material restrictions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If copper is selected to make the signal wires to reduce impedance difference, then the impedance difference between signal wires is reduced, but the manufacturing cost is greatly increased

Engineering Contradiction:
Improveimpedance consistencyVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the physical parameters of the signal wires by adjusting their cross-sectional areas (widths and/or thicknesses) to compensate for length differences. This allows achieving uniform impedance across wires of different lengths using conventional materials, thereby reducing manufacturing cost while maintaining signal integrity.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the length of signal wires is adjusted to accommodate different display sizes, then the display device can be adapted to different screen sizes, but the impedance difference between signal wires increases causing signal delays

Engineering Contradiction:
Improvedisplay size adaptabilityVSAvoidsignal transmission quality
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent compensates for the impedance variation caused by different wire lengths by adjusting the cross-sectional area parameters of the wires. This allows the display device to maintain consistent signal quality across different screen sizes and configurations.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies different cross-sectional dimensions to different signal wires based on their specific length requirements. Each wire is locally optimized with appropriate width and/or thickness to achieve uniform impedance characteristics across the entire wiring system.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If conventional wiring methods are used with fixed cross-sectional areas, then the manufacturing process is simple, but the impedance difference between signal wires of different lengths cannot be effectively reduced

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidimpedance consistency
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extends conventional wiring by introducing variable cross-sectional area parameters. Instead of using uniform wire dimensions, the method adjusts width and/or thickness of individual wires to compensate for length variations, achieving impedance matching while remaining compatible with existing manufacturing processes.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11088176B2Display device
Publication Date: 2021.08.10 HKC CORP LTD
  • US11088176B2 patent drawing
  • US11088176B2 patent drawing
  • US11088176B2 patent drawing

AI summary

The present disclosure provides a display device including an array substrate. At least one wiring on array is arranged on a surface of the array substrate, the wiring on array including a plurality of signal wires, and all the signal wires of the wiring on array being the same in impedance and different in length and in cross-sectional area. At least one first driving component is arranged at one side of the array substrate, adjacent first driving components being electrically connected via one wiring on array. At least one second driving component is arranged at the same side or different sides of the array substrate as the first driving member, adjacent second driving components being electrically connected via one wiring on array or adjacent first and second driving components being electrically connected via one wiring on array.