Wiring Board Binary Tree Signal Delay Equalization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional wiring boards for connecting semiconductor chips face challenges in ensuring all bus wiring paths have equal lengths, leading to signal transmission delays and instability, especially at high speeds beyond gigabit speeds due to varying via lengths.
Innovation Solution
The design of a wiring board that incorporates a complete binary tree structure with equal-length wire paths including via lengths, ensuring that all connections between semiconductor chips are completely equal, minimizing signal transmission delays by maintaining uniform wiring lengths across all paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional bus wiring method is used with vias to connect front-side and back-side layers, then wiring paths can be extended to multiple semiconductor chips, but the wiring lengths become unequal due to via lengths, causing signal transmission delays
Solution Approach 1:
The patent changes the physical parameters of the wiring paths by introducing meandering routes and adjusting wire lengths to compensate for via lengths. Specifically, wires connecting to chips on the same side as the via are extended with meandering paths, while wires on the opposite side are shortened, thereby equalizing total path lengths across all semiconductor chips despite the presence of vias with different lengths
Solution Approach 2:
The patent utilizes the third dimension (z-axis) by routing wires through multiple layers (front-side layer, back-side layer, and intermediate layers). This multi-layer approach allows wires to traverse different depths and paths, enabling compensation for via length differences by adjusting the number and position of layer transitions, thus achieving equal effective wiring lengths
2Adaptability or versatility
If wiring paths are extended to connect multiple semiconductor chips through vias, then system functionality is improved, but signal transmission stability deteriorates due to unequal path lengths and phase differences
Solution Approach 1:
The patent adjusts the electrical length parameters of wiring paths by introducing meandering sections and varying wire geometries. Wires are designed with different lengths and routing patterns to compensate for the additional delay introduced by vias, ensuring that all signal paths have equal effective lengths and arrive at their destinations simultaneously, thereby maintaining signal integrity and system reliability
Solution Approach 2:
The patent performs preliminary compensation for via-induced delays during the wiring design phase. By calculating the expected delay differences based on via positions and lengths, the wiring paths are pre-adjusted with appropriate meandering and length variations before fabrication, ensuring that all signals are synchronized upon arrival at the semiconductor chips without requiring additional delay compensation circuits
Data Source
AI summary
A difference in delay of signal transmission due to the wiring within a board is minimized. A wiring board includes wiring for connecting terminals included in one of a plurality of semiconductor chips to terminals included in another one of the plurality of semiconductor chips, through branch points. Each of the plurality of semiconductor chips includes first and second terminals. Moreover, a first wiring up to the first terminals and a second wiring up to the second terminals are in a positional relationship of being shifted parallel to each other in a planar direction of the wiring board so as not to come into electrical contact with each other. In each of the first and second wirings, a wire is provided between a connection point for the terminal in a first one of the semiconductor chips and a position of a root, a complete binary tree structure in which all leaves are at the same depth from the root is formed, connection points for the terminals in the rest of the semiconductor chips are positioned at the respective leaves, and the paths of wires respectively corresponding to branches at the same depth in the tree structure include vias and the lengths of the paths of wires including the lengths of the vias are equal to each other.