Wiring Board Bump Pads for Interposer-Free Package-on-Package Bonding

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Solution Overview

Problem

Conventional package-on-package (POP) bonding methods require additional manufacturing steps and materials, increasing costs and reducing reliability due to the use of interposers or large amounts of solder, which can lead to solder separation and bridge formation.

Innovation Solution

A wiring board structure with stacked wiring layers and insulating layers connected via vias, featuring bump-shaped pads on the outermost insulating layer for easy POP bonding without an interposer, using a reduced amount of solder to narrow the gap between packages, enhancing bonding reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an interposer is used for POP bonding, then the bonding structure is established, but the manufacturing process complexity and cost increase due to additional fabrication steps

Engineering Contradiction:
Improvebonding reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts and eliminates the interposer component from the POP bonding structure. By removing the interposer, the patent directly bonds the lower package terminals to the upper package terminals through solder, thereby reducing manufacturing process complexity while maintaining bonding reliability through proper solder bump formation and control

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the functions of the interposer and the upper package into a single integrated structure. The upper package substrate directly provides the bonding surface for the lower package terminals, eliminating the need for a separate interposer component and simplifying the overall manufacturing process

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If a large amount of solder is used for POP bonding, then the gap between packages is filled, but solder separation and bridge formation occur reducing reliability

Engineering Contradiction:
Improvebonding reliabilityVSAvoidsolder quantity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The invention changes the solder application parameters by using controlled solder bump formation instead of excessive solder application. By precisely controlling the solder amount, viscosity, and application method, the patent achieves reliable bonding without the harmful effects of solder separation and bridge formation that occur with large amounts of solder

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention introduces a properly designed solder bump as an intermediary element between the lower and upper package terminals. This controlled solder intermediary provides reliable electrical and mechanical connection while preventing the solder defects associated with using excessive solder material

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If the gap between packages is large, then the chip mounting space is sufficient, but the solder amount increases leading to bonding defects

Engineering Contradiction:
Improvechip mounting areaVSAvoidsolder quantity
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

The invention applies local quality control by providing sufficient chip mounting area on the upper package while simultaneously controlling the solder quantity only in the bonding regions. This allows the chip to have adequate space for mounting without requiring excessive solder throughout the entire package structure, thereby preventing bonding defects

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8338718B2Wiring board and method of manufacturing the same
Publication Date: 2012.12.25 SHINKO ELECTRIC IND CO LTD
  • US8338718B2 patent drawing
  • US8338718B2 patent drawing
  • US8338718B2 patent drawing

AI summary

A wiring board (package) has a structure in which multiple wiring layers are stacked one on top of another with insulating layers each interposed between corresponding two of the wiring layers, and the wiring layers are connected to each other through vias formed in the insulating layers. In the peripheral region around the chip mounting area of the outermost insulating layer on one of both surfaces of the board, a pad is formed in a bump shape to cover a surface of a portion of the outermost insulating layer, the portion being formed to protrude, and a pad whose surface is exposed from the insulating layer is arranged in the chip mounting area. A chip is flip-chip bonded to the pad of the package, and another package is bonded to the bump shaped pad in a peripheral region around the chip (package-on-package bonding).