Wiring Board Carrier Release with Edge Cut Lines for Photolithography
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Solution Overview
Problem
The existing methods for manufacturing multilayer printed wiring boards using the coreless build-up method face challenges in accurately performing photolithography after carrier release, as they often result in damage to the device layer and size discrepancies, leading to positioning issues during exposure processes.
Innovation Solution
A method involving a laminated sheet with a release layer, a metal layer, and a device layer, where cut lines are made to pass through the carrier, release layer, and metal layer, allowing for the removal of outer edge portions to form pressurizable exposed portions on the device layer, enabling accurate carrier release and photolithography without damaging the device layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional carrier release methods are used, then the carrier can be removed from the laminated sheet, but the device layer is damaged and size discrepancies occur leading to positioning issues
Solution Approach 1:
The invention introduces cut lines that divide the laminated sheet into segmented regions. These cut lines pass through the carrier, release layer, and metal layer but stop before reaching the device layer, creating isolated outer edge portions that can be removed independently. This segmentation allows the carrier to be released without applying stress to the device layer, thus preventing damage and maintaining positioning accuracy.
Solution Approach 2:
The invention extracts and removes only the outer edge portions of the carrier, release layer, and metal layer that lie outside the cut lines. By selectively removing these specific portions while leaving the central region intact, the carrier release process is facilitated without affecting the device layer's integrity or dimensions, thereby avoiding positioning issues during subsequent photolithography.
2Area of moving object
If the device layer size is reduced for miniaturization, then mounting density increases, but alignment mark displacement occurs during photolithography
Solution Approach 1:
The invention performs preliminary action by creating cut lines and removing outer edge portions before the photolithography process. This preliminary preparation ensures that the device layer maintains its correct size and position, and alignment marks remain properly positioned, preventing any displacement issues that would otherwise occur during subsequent photolithography operations.
Data Source
AI summary
There is provided a method for manufacturing a wiring substrate in which damage to a device layer during carrier release can be suppressed, and a photolithography process can be carried out with good accuracy on the device layer after carrier release. This method includes: providing a laminated sheet including a carrier, a release layer, a metal layer, and a device layer in order; making a cut line from a surface of the laminated sheet on the carrier side so that the cut line passes through the carrier, the release layer, and the metal layer when the laminated sheet is seen in a cross-sectional view; and removing outer edge portions outside the cut line in the carrier, the release layer, and the metal layer, thereby exposing part of a surface of the device layer on the metal layer side to form a pressurizable exposed portion for promoting release of the carrier.