Multilayer Wiring Board Structure for Fine-Gap Crack Prevention

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Solution Overview

Problem

Conventional multilayer wiring boards face challenges in embedding plating in fine gaps between insulating and interconnect layers, leading to unintended gaps that can cause cracks and disconnections.

Innovation Solution

A wiring board design with a first and second interconnect structure, where the second interconnect structure has smaller interconnect width and spacing, and an insulating layer with a filler having a smaller grain diameter, which covers the upper surfaces of the first interconnect and insulating layers, filling gaps and improving adhesion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If plating is embedded in the fine gap between the insulating layer and the interconnect layer to improve adhesion, then adhesion between layers is improved, but the plating cannot be properly embedded in the fine gap, resulting in unintended gaps and potential cracks

Engineering Contradiction:
Improveadhesion between insulating layer and interconnect layerVSAvoidgap filling precision
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent changes the physical parameters of the insulating layer by controlling the filler grain diameter to be 10 μm or less, with an average grain diameter of 5 μm or less. This parameter change enables the insulating layer material to properly fill the fine gaps between the interconnect layer and previous structures, eliminating unintended gaps while maintaining structural integrity and adhesion.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the interconnect width and spacing are reduced to increase circuit density, then circuit integration is improved, but the finer structures become more susceptible to cracks and disconnections

Engineering Contradiction:
Improvecircuit integration densityVSAvoidresistance to cracks and disconnections
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the filler grain diameter parameter of the insulating layer to 10 μm or less (average 5 μm or less), which provides sufficient material flow and filling capability for fine-pitch interconnect structures. This enables the production of high-density circuits with reduced interconnect width and spacing while maintaining reliability by preventing crack formation through proper gap filling and reduced stress concentration.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240015888A1Wiring board
Publication Date: 2024.01.11 SHINKO ELECTRIC IND CO LTD
  • US20240015888A1 patent drawing
  • US20240015888A1 patent drawing
  • US20240015888A1 patent drawing

AI summary

A wiring board includes a first interconnect structure including a first interconnect layer and a first insulating layer, and a second interconnect structure, including a second interconnect layer and a second insulating layer, and disposed on the first interconnect structure. Interconnect width and spacing of the second interconnect layer are smaller than those of the first interconnect layer. The first insulating layer covers a side surface of the first interconnect layer and exposes an upper surface of the first interconnect layer. The second insulating layer covers the upper surface of the first interconnect layer and an upper surface of the first insulating layer. The first insulating layer and the second insulating layer include a filler. An average grain diameter and a maximum grain diameter of the filler included in the second insulating layer are smaller than those of the filler included in the first insulating layer.