Wiring Board Multi-Layer Mounting Pads Positional Shift
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Solution Overview
Problem
The increasing fineness and integration of IC chips lead to a higher number of mounting pads on package substrates, requiring finer wiring pitches, which poses challenges in ensuring stable connections between semiconductor elements and wiring boards due to potential positional shifting during mounting, and limits the use of generic semiconductor elements.
Innovation Solution
A wiring board design featuring a first insulation layer with first conductive patterns, a wiring structure within a second insulation layer, and third mounting pads set off from second mounting pads to accommodate semiconductor elements, allowing for flexible positioning and connection without altering pad intervals, combined with a manufacturing method that includes forming conductive patterns and via conductors to ensure stable connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of mounting pads is increased to accommodate finer IC chips, then the integration capability is improved, but the positional shifting during mounting increases causing connection failures
Solution Approach 1:
The patent introduces a multi-layer structure with mounting pads distributed across different layers (first mounting pads on the first main surface, second mounting pads on the second main surface, and third mounting pads on the first main surface). This spatial distribution in multiple dimensions allows connections to be established even when positional shifting occurs in the planar direction, thereby maintaining connection reliability while supporting higher integration.
Solution Approach 2:
The patent employs a hierarchical connection structure where third mounting pads connect to second mounting pads through via conductors, which in turn connect to first mounting pads. This nested arrangement of connection paths provides redundant routing, allowing the system to tolerate positional deviations while maintaining stable electrical connections.
2Quantity of substance
If the wiring pitch is reduced to accommodate more mounting pads, then the integration density is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent divides the mounting pad structure into multiple segments across different layers. Instead of requiring all mounting pads to be precisely positioned in a single plane, the pads are segmented into first mounting pads, second mounting pads, and third mounting pads on different layers, reducing the precision requirements for each individual layer while achieving high overall integration density.
Solution Approach 2:
By extending the mounting pad arrangement into the vertical dimension with multiple layers, the patent effectively increases the available space for mounting pads without requiring proportionally smaller planar pitch. This dimensional expansion allows higher pad density to be achieved with relaxed manufacturing precision constraints.
3Reliability
If the mounting pad positions are fixed to ensure stable connections, then the connection reliability is improved, but the adaptability to generic semiconductor elements decreases
Solution Approach 1:
The multi-layer mounting pad structure serves multiple functions: it provides stable connections through redundant pathways while simultaneously accommodating variations in semiconductor element positions. The distributed pad arrangement across layers makes the substrate compatible with generic semiconductor elements that may have slight positional variations, enhancing universality without sacrificing connection reliability.
Data Source
AI summary
A wiring board includes a first insulation layer, first conductive patterns formed on the first insulation layer and including first mounting pads positioned to mount a semiconductor element, a wiring structure positioned in the first insulation layer and including a second insulation layer, second conductive patterns formed on the second insulation layer, and second mounting pads connected to the second conductive patterns, and third mounting pads formed on the first insulation layer above the second mounting pads and connected to the second mounting pads such that the third mounting pads are positioned to mount the semiconductor element and are set off from the second mounting pads toward the semiconductor element.