Wiring Board Pad Plating Layout for Narrow-Gap Insulation
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Solution Overview
Problem
The narrow spacing between adjacent pads on wiring boards can lead to reduced Highly Accelerated Temperature and Humidity Stress (HAST) resistance due to the plating layer extending onto the protective insulating layer, compromising insulation integrity.
Innovation Solution
The design includes pads with exposed regions on the insulating layer where the plating layer is restricted to cover only the upper surfaces, avoiding coverage on the side surfaces, thereby maintaining a clear gap between pads and enhancing insulation properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the protective insulating layer is disposed between adjacent pads, then the insulation property is improved, but the interval between pads becomes narrow making it impossible to dispose the protective insulating layer
Solution Approach 1:
The patent extracts the plating layer from the side surface of the pad, making it recessed relative to the pad surface. This removal of the plating layer from the side surface allows the protective insulating layer to be disposed between adjacent pads without being blocked by extended plating, thereby resolving the contradiction between maintaining insulation properties and preserving sufficient pad interval.
Solution Approach 2:
The patent introduces a recessed plating layer configuration as an intermediary solution. By making the plating layer recessed rather than extending outward, it creates space for the protective insulating layer to be placed between pads, serving as a mediating structure that enables both adequate insulation and sufficient pad spacing.
2Reliability
If the plating layer covers the side surface of the pad, then the corrosion resistance is improved, but the plating layer extends to the upper surface of the protective insulating layer narrowing the interval between pads
Solution Approach 1:
The patent extracts the plating layer from the side surface of the pad, creating a recessed configuration. This removal prevents the plating layer from extending to the upper surface of the protective insulating layer, thereby maintaining the interval between pads while still providing corrosion resistance through alternative means such as protective insulating layers.
Solution Approach 2:
Instead of having the plating layer extend outward to cover the side surface, the patent inverts the approach by making the plating layer recessed. This inversion allows the protective insulating layer to cover the side surface, providing both corrosion resistance and adequate pad spacing.
3Productivity
If the pad spacing is reduced to increase component density, then the productivity is improved, but the HAST resistance deteriorates due to plating layer extension
Solution Approach 1:
The patent extracts the plating layer from the side surface of the pad, preventing it from extending between adjacent pads. This enables reduced pad spacing for higher component density while maintaining HAST resistance, as the recessed plating configuration eliminates the source of the reliability problem.
Solution Approach 2:
The patent changes the spatial parameter of the plating layer from an extended configuration to a recessed configuration. This parameter change allows for reduced pad spacing without compromising HAST resistance, thereby enabling increased component density while maintaining reliability.
Data Source
AI summary
A wiring board includes an insulating layer, first and second pads provided on the insulating layer and including a first surface in contact with the insulating layer, a second surface opposite to the first surface, and a side surface connecting the first and second surfaces, respectively, and a protective insulating layer provided above the insulating layer. The first and second pads have a portion exposed inside an opening in the protective insulating layer. The first pad has a portion opposing the second pad without the protective insulating layer interposed between the first and second pads. A region of the second surface of the first and second pads exposed from the protective insulating layer is covered with a plating layer. A region of the side surface of the first and second pads exposed from the protective insulating layer is exposed from the plating layer.