Semiconductor Module Wiring Board Recesses for Thermal Stress Bonding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing semiconductor modules face challenges in maintaining bonding strength between semiconductor elements and metal wiring boards due to temperature-induced stress fluctuations, which can lead to distortion and reduced solder thickness, affecting the reliability and tolerance of the module.
Innovation Solution
A semiconductor module design featuring a metal wiring board with a first bonding portion that includes a plate-shaped portion with bosses on the lower surface and recesses on the upper surface, along with additional recesses on the upper surface, which are formed during the manufacturing process to enhance bonding strength and maintain solder thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the metal wiring board is solder-bonded to the surface of the power semiconductor element, then electrical connection is achieved, but distortion occurs in the bonding portion due to temperature-induced stress fluctuations
Solution Approach 1:
The patent applies local quality by creating recesses at specific locations on the metal wiring board (positions corresponding to semiconductor element corners and intermediate positions) to locally compensate for distortion. This targeted approach addresses stress concentration points without requiring overall structural changes, thereby maintaining bonding strength while reducing distortion-induced reliability issues.
Solution Approach 2:
The patent implements preliminary action by pre-forming recesses on the metal wiring board before the soldering process. These recesses are prepared in advance to compensate for expected thermal expansion and stress effects that will occur during operation, allowing the bonding portion to maintain stability despite temperature-induced stress fluctuations.
2Reliability
If the metal wiring board is arranged on the semiconductor element, then electrical bonding is achieved, but the plate-shaped bonding portion becomes inclined during solder bonding, partially reducing the solder thickness
Solution Approach 1:
The patent applies local quality by creating recesses at specific locations on the metal wiring board (positions corresponding to semiconductor element corners and intermediate positions) to locally compensate for distortion. This targeted approach addresses stress concentration points without requiring overall structural changes, thereby maintaining bonding strength while reducing distortion-induced reliability issues.
Solution Approach 2:
The patent implements preliminary action by pre-forming recesses on the metal wiring board before the soldering process. These recesses are prepared in advance to compensate for expected thermal expansion and stress effects that will occur during operation, allowing the bonding portion to maintain stability despite temperature-induced stress fluctuations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the bonding strength between the semiconductor element and the metal wiring board while ensuring the thickness of the bonding material, thereby enhancing the module's tolerance and reliability by stabilizing the bonding process and reducing thermal stress-induced peeling.
Implementation Method 1
One end of the metal wiring board is electrically bonded to the upper surface electrode via a bonding material such as solder.
Data Source
AI summary
A semiconductor module includes a stacked substrate includes an insulating plate and first and second circuit boards arranged on the insulating plate, a semiconductor element arranged on the first circuit board, and a metal wiring board having a first bonding portion bonded to an upper surface of the semiconductor element via a first bonding material. The first bonding portion includes a first plate-shaped portion that has at a lower surface thereof, a boss protruding toward the semiconductor element, and at an upper surface thereof, a first recess at a position corresponding to a position immediately above the boss and multiple second recesses. At the upper surface of the first plate-shaped portion, each of the second recesses has an opening area smaller than an opening area of the first recess.