Multilayer Wiring Board Shrinkage Suppression Layer Thickness

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Solution Overview

Problem

Multilayer wiring boards with ceramic and shrinkage suppression layers face issues of flatness deterioration, warpage, and fractures due to uneven shrinkage during firing, especially when wiring electrodes are concentrated, leading to compressive stress disparities and reduced thickness of shrinkage suppression layers around electrodes.

Innovation Solution

A method of manufacturing multilayer wiring boards where the thickness of the peripheral area of the shrinkage suppression layer around wiring electrodes is increased to prevent reduction during press-bonding, ensuring consistent shrinkage suppression and maintaining high dimensional accuracy by setting the thickness of the peripheral area larger than other portions, thus reducing the risk of flatness deterioration and fractures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If wiring electrodes are patterned on shrinkage suppression layers and insulating layers are stacked, then wiring functionality is achieved, but thickness of shrinkage suppression layer is reduced around wiring electrodes causing uneven shrinkage

Engineering Contradiction:
Improvewiring electrode configurationVSAvoidthickness uniformity of shrinkage suppression layer
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The shrinkage suppression layer is designed with non-uniform thickness, featuring a peripheral area with greater thickness than the contact area. This local quality variation ensures that the peripheral area provides enhanced shrinkage suppression for the ceramic layer, while the contact area accommodates the wiring electrode. The thickness distribution is specifically engineered to maintain dimensional accuracy while supporting wiring electrode placement.

Inventive Principle:
Principle #3Local quality

2Strength

If compressive stress is applied to fix insulating layers, then layers are bonded together, but thickness of shrinkage suppression layer is reduced around wiring electrodes

Engineering Contradiction:
Improvebonding strength of insulating layersVSAvoidthickness uniformity of shrinkage suppression layer
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The shrinkage suppression layer is pre-formed with a specific thickness distribution before the press-bonding process. The peripheral area is designed with greater thickness in advance, so that when compressive stress is applied during press-bonding, the thickness reduction is minimized or prevented in the peripheral area. This preliminary structural preparation ensures that the shrinkage suppression function is maintained while still allowing for layer bonding.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If shrinkage suppression force is reduced, then wiring electrode placement is facilitated, but dimensional accuracy of multilayer wiring board deteriorates

Engineering Contradiction:
Improvewiring electrode placementVSAvoiddimensional accuracy of multilayer wiring board
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The shrinkage suppression layer exhibits local quality variations with different thicknesses in different regions. The peripheral area has greater thickness to maintain shrinkage suppression force and ensure dimensional accuracy, while the contact area has reduced thickness to facilitate wiring electrode placement. This localized differentiation allows the structure to simultaneously achieve both manufacturing ease and dimensional precision.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method significantly reduces the risk of flatness deterioration, warpage, and fractures in multilayer wiring boards by ensuring consistent shrinkage suppression, maintaining high dimensional accuracy, and allowing for denser wiring electrode configurations without separation issues.

Implementation Method 1

a shrinkage suppression layer 101b that is stacked on top of the ceramic layer 101a, being fixed to one another by applying pressure and then fired

Methodology Applied
Scientific EffectShrinkage suppression:

Implementation Method 2

a compressive stress that is applied to a portion that is interposed between the corresponding ceramic layer 101a and one of the wiring electrodes 102

Methodology Applied
Scientific EffectCompressive stress: Compression

Implementation Method 3

fixed to one another by applying pressure and then fired

Methodology Applied
Scientific EffectFiring: Sintering

Data Source

PatentUS9523709B2Method of manufacturing multilayer wiring board, probe card including multilayer wiring board manufactured by the method, and multilayer wiring board
Publication Date: 2016.12.20 MURATA MFG CO LTD
  • US9523709B2 patent drawing
  • US9523709B2 patent drawing
  • US9523709B2 patent drawing

AI summary

A method of manufacturing a multilayer wiring board includes a stacking process in which insulating layers, each of which includes a ceramic layer and a shrinkage suppression layer being stacked on top of the ceramic layer, are stacked on top of one another, a press-bonding process in which the insulating layers are press-bonded, so that a multilayer body is formed, and a firing process in which the multilayer body is fired. In the stacking process, in each of the insulating layers, a wiring electrode is formed on a surface of the shrinkage suppression layer on the opposite side to the surface of the layer facing the ceramic layer, and the thickness of a peripheral area of the shrinkage suppression layer located around the area of the shrinkage suppression layer that is in contact with the electrode is larger than those of portions of the layer except for the peripheral area.