Wiring Board Signal Layout for Impedance-Stable High-Speed Routing
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Solution Overview
Problem
The challenge is to enhance the transmission speed and reduce the size of electronic devices while maintaining signal quality, as increased transmission speed tends to increase device size, and densely mounting signal transmission paths leads to interference and decreased signal quality due to impedance discontinuities.
Innovation Solution
The solution involves a wiring board design with specific signal wiring configurations, where a first signal wiring portion is positioned between ground patterns and has a wider width than a second portion, reducing parasitic capacitance and characteristic impedance discrepancies across different regions, thereby stabilizing signal transmission and reducing cross-talk noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If transmission speed is increased, then performance is improved, but device size increases
Solution Approach 1:
The signal wiring width is varied locally according to position: wider in the first region overlapping the semiconductor device, and narrower in the second region not overlapping the device. This local variation optimizes signal quality at the device interface while minimizing overall device size in the extended transmission regions.
Solution Approach 2:
The characteristic impedance of the signal wiring is changed by adjusting the wiring width parameter. The wiring width transitions from a first width in the first region to a second width in the second region, creating an impedance transition that controls signal reflection and enables compact device design without sacrificing transmission speed.
2Volume of moving object
If signal wirings are densely mounted, then device size is reduced, but signal quality decreases due to impedance discontinuities
Solution Approach 1:
Different wiring widths are applied in different regions: wider wiring in the first region reduces impedance discontinuity and improves signal quality where the semiconductor device is mounted, while narrower wiring in the second region allows denser routing. This regional differentiation maintains signal integrity despite dense mounting.
Solution Approach 2:
The wiring width parameter is changed across different regions to control characteristic impedance. By transitioning from a first width to a second width, the impedance discontinuity is managed, reducing signal reflection and maintaining reliable signal transmission even with dense wiring arrangements.
3Reliability
If wiring width is increased to reduce impedance discontinuity, then signal quality improves, but device size increases
Solution Approach 1:
The wider wiring width is applied only locally in the first region where the semiconductor device is mounted, which is the critical area for signal quality. In the second region, the narrower wiring width is used to minimize device size. This localized approach achieves signal quality improvement without proportional increase in overall device size.
Solution Approach 2:
The wiring width parameter transitions from a first width to a second width across different regions, creating an impedance transition structure. This controlled parameter change manages signal reflection while allowing the device to maintain a compact overall size, as the wider section is confined to the necessary region only.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses the increase in device size, improves signal quality by minimizing impedance discontinuities, and reduces cross-talk noise, maintaining efficient signal transmission even in densely packed signal paths.
Implementation Method 1
reducing parasitic capacitance and characteristic impedance discrepancies across different regions
Implementation Method 2
minimizing impedance discontinuities
Data Source
AI summary
The wiring board has a first region overlapping a first semiconductor device and a second region not overlapping each of the first semiconductor device and a second semiconductor device. A first signal wiring of the wiring board has a first portion in the first region and a second portion in the second region. In a thickness direction of the wiring board, the second portion is between two ground patterns to which a reference potential is supplied, while the first portion has a portion not positioned between two ground patterns to which a reference potential is supplied. The first portion has a first wide portion having a larger width than a width of the second portion.