Wiring Board Surface Roughness Design for Adhesion and Thickness
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Solution Overview
Problem
The existing manufacturing process for build-up wiring boards often results in a reduction of wiring layer thickness due to surface etching, which can lead to breakage, especially when the wiring layer is formed thin for miniaturization purposes.
Innovation Solution
A wiring board design where the surface of the first wiring layer, in contact with the support, is not etched, maintaining its desired thickness, and the second wiring layer is roughened to enhance adhesion with the solder resist layer, while the first surface remains flush with the insulating layer, preventing thickness reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the surface of the wiring layer is etched to increase adhesion with the solder resist layer, then the adhesion is improved, but the wiring layer thickness is reduced
Solution Approach 1:
The patent applies different surface treatments to different wiring layers: the first wiring layer surface is kept flat (not etched) to maintain thickness, while the second wiring layer surface is etched to increase roughness and adhesion. This local differentiation resolves the contradiction by applying the appropriate surface treatment only where needed.
2Length of moving object
If the wiring layer is formed thin for miniaturization, then the device size is reduced, but the wiring layer becomes prone to breakage
Solution Approach 1:
The patent maintains the first wiring layer thickness by not etching its surface, while allowing the second wiring layer to be etched for adhesion. This selective approach preserves the structural integrity of the first (thinner) wiring layer needed for miniaturization while preventing breakage through proper thickness control.
Data Source
AI summary
A wiring board includes an insulating layer, a first wiring layer, and a second wiring layer. The first wiring layer is formed in a first surface of the insulating layer, and includes a pad on which a semiconductor chip is to be mounted and a wiring pattern. The second wiring layer is formed on a second surface of the insulating layer opposite to the first surface. The roughness of a surface of the first wiring layer exposed at the first surface of the insulating layer is smaller than the roughness of a surface of the second wiring layer exposed on the second surface of the insulating layer.