Wiring Board Via Structure for Smooth High-Frequency Interconnects
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Solution Overview
Problem
Conventional methods face challenges in depositing a seed layer inside via holes of wiring boards due to their small diameter, leading to increased surface roughness on the insulating layer, which deteriorates high-frequency transmission characteristics.
Innovation Solution
A wiring board design featuring a cavity in the interconnect layer that communicates with the via hole, with a first seed layer on the insulating layer and a second seed layer covering the inner side surfaces, ensuring deposition and minimizing surface roughness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the seed layer is formed by the wet process to ensure deposition inside the via hole, then the deposition reliability is improved, but the surface roughness of the upper surface of the insulating layer increases due to roughening pretreatment
Solution Approach 1:
The seed layer formation process is segmented into two distinct stages: first forming a preliminary seed layer by dry process to protect the insulating layer surface, then forming the final seed layer by wet process to ensure complete coverage inside the via hole. This segmentation allows each process to be optimized independently, resolving the contradiction between deposition reliability and surface roughness.
Solution Approach 2:
The preliminary seed layer is formed by dry process before the wet process seed layer formation. This preliminary action protects the insulating layer surface from roughening during the wet process pretreatment, while still allowing the subsequent wet process to achieve complete seed layer deposition inside the via hole.
2Productivity
If the diameter of the via hole is decreased to enable high-speed data transmission, then the transmission capacity is improved, but the tendency of the seed layer not being deposited inside the via hole becomes more conspicuous
Solution Approach 1:
The preliminary seed layer formed by dry process acts as an intermediary that facilitates the subsequent wet process seed layer formation. This intermediary layer provides a foundation that enables complete seed layer deposition inside small-diameter via holes, resolving the deposition reliability issue while maintaining the small via hole dimensions for high-speed transmission.
3Strength
If the upper surface of the insulating layer is roughened by pretreatment to improve adhesion, then the adhesion of the seed layer is improved, but the skin effect is significantly increased and high-frequency transmission characteristics are deteriorated
Solution Approach 1:
The surface treatment is applied locally only to the inner surface of the via hole rather than the entire upper surface of the insulating layer. This localized roughening improves adhesion where needed (inside the via hole) while leaving the outer surface smooth to minimize skin effect and maintain high-frequency transmission characteristics.
Solution Approach 2:
The seed layer formation is segmented into dry and wet process stages, allowing the wet process pretreatment to be applied only where needed (inside the via hole) without affecting the overall surface roughness of the insulating layer upper surface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design allows for effective seed layer deposition within via holes while maintaining smooth insulating layer surfaces, enhancing high-frequency transmission performance.
Implementation Method 1
The seed layer is formed inside the via hole and on the upper surface of the insulating layer by a dry process, such as ion plating or the like
Implementation Method 2
The seed layer is formed inside the via hole and on the upper surface of the insulating layer by a dry process, such as ion plating or the like
Implementation Method 3
electrolytic plating is performed by using the second seed layer as a power supply layer, for example, thereby forming the second interconnect layer
Data Source
AI summary
A wiring board includes an insulating layer covering upper and side surfaces of a first interconnect layer, a via hole penetrating the insulating layer and reaching the first interconnect layer, a second interconnect layer filling the via hole and extending on the insulating layer, and a cavity provided in the first interconnect layer, communicating with the via hole and extending outside than a lower end of an inner side surface of the via hole in a plan view. The second interconnect layer includes a first seed layer provided on the insulating layer, a second seed layer continuously covering upper and inner side surfaces of the first seed layer, the inner side surface of the via hole, and surfaces of the insulating layer and the first interconnect layer exposed inside the cavity, and an electrolytic plating layer provided on the second seed layer thicker than the first seed layer.